diff --git a/README b/README index 385798cc..7068197d 100644 --- a/README +++ b/README @@ -47,6 +47,7 @@ This library supports several architecture/operating-system combinations: | FreeBSD | AArch64 | ✓ | | FreeBSD | PPC32 | ✓ | | FreeBSD | PPC64 | ✓ | +| FreeBSD | RISC-V | 64-bit only | | QNX | Aarch64 | ✓ | | QNX | x86-64 | ✓ | | Solaris | x86-64 | ✓ | diff --git a/include/tdep-riscv/jmpbuf.h b/include/tdep-riscv/jmpbuf.h index 8831f690..5324ab1e 100644 --- a/include/tdep-riscv/jmpbuf.h +++ b/include/tdep-riscv/jmpbuf.h @@ -23,8 +23,6 @@ LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ -#if defined __linux__ - /* https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/riscv/setjmp.S;h=0b92016b311b11aa9eeb62b38c670a262f1924c9;hb=HEAD */ #define JB_SP 13 #define JB_RP 0 @@ -45,5 +43,3 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ #else # error "Add offsets here" #endif /* __riscv_xlen */ - -#endif diff --git a/src/coredump/_UCD_access_reg_freebsd.c b/src/coredump/_UCD_access_reg_freebsd.c index 563d23f9..1840cdbd 100644 --- a/src/coredump/_UCD_access_reg_freebsd.c +++ b/src/coredump/_UCD_access_reg_freebsd.c @@ -146,6 +146,52 @@ _UCD_access_reg (unw_addr_space_t as, return -UNW_EINVAL; } } +#elif defined(UNW_TARGET_RISCV) + if (regnum >= UNW_RISCV_X0 && regnum <= UNW_RISCV_X31) { + switch (regnum) { + case UNW_RISCV_X0: *valp = 0; break; + case UNW_RISCV_X1: *valp = ui->prstatus->pr_reg.ra; break; + case UNW_RISCV_X2: *valp = ui->prstatus->pr_reg.sp; break; + case UNW_RISCV_X3: *valp = ui->prstatus->pr_reg.gp; break; + case UNW_RISCV_X4: *valp = ui->prstatus->pr_reg.tp; break; + case UNW_RISCV_X5: *valp = ui->prstatus->pr_reg.t[0]; break; + case UNW_RISCV_X6: *valp = ui->prstatus->pr_reg.t[1]; break; + case UNW_RISCV_X7: *valp = ui->prstatus->pr_reg.t[2]; break; + case UNW_RISCV_X8: *valp = ui->prstatus->pr_reg.s[0]; break; + case UNW_RISCV_X9: *valp = ui->prstatus->pr_reg.s[1]; break; + case UNW_RISCV_X10: *valp = ui->prstatus->pr_reg.a[0]; break; + case UNW_RISCV_X11: *valp = ui->prstatus->pr_reg.a[1]; break; + case UNW_RISCV_X12: *valp = ui->prstatus->pr_reg.a[2]; break; + case UNW_RISCV_X13: *valp = ui->prstatus->pr_reg.a[3]; break; + case UNW_RISCV_X14: *valp = ui->prstatus->pr_reg.a[4]; break; + case UNW_RISCV_X15: *valp = ui->prstatus->pr_reg.a[5]; break; + case UNW_RISCV_X16: *valp = ui->prstatus->pr_reg.a[6]; break; + case UNW_RISCV_X17: *valp = ui->prstatus->pr_reg.a[7]; break; + case UNW_RISCV_X18: *valp = ui->prstatus->pr_reg.s[2]; break; + case UNW_RISCV_X19: *valp = ui->prstatus->pr_reg.s[3]; break; + case UNW_RISCV_X20: *valp = ui->prstatus->pr_reg.s[4]; break; + case UNW_RISCV_X21: *valp = ui->prstatus->pr_reg.s[5]; break; + case UNW_RISCV_X22: *valp = ui->prstatus->pr_reg.s[6]; break; + case UNW_RISCV_X23: *valp = ui->prstatus->pr_reg.s[7]; break; + case UNW_RISCV_X24: *valp = ui->prstatus->pr_reg.s[8]; break; + case UNW_RISCV_X25: *valp = ui->prstatus->pr_reg.s[9]; break; + case UNW_RISCV_X26: *valp = ui->prstatus->pr_reg.s[10]; break; + case UNW_RISCV_X27: *valp = ui->prstatus->pr_reg.s[11]; break; + case UNW_RISCV_X28: *valp = ui->prstatus->pr_reg.t[3]; break; + case UNW_RISCV_X29: *valp = ui->prstatus->pr_reg.t[4]; break; + case UNW_RISCV_X30: *valp = ui->prstatus->pr_reg.t[5]; break; + case UNW_RISCV_X31: *valp = ui->prstatus->pr_reg.t[6]; break; + } + } else { + switch (regnum) { + case UNW_RISCV_PC: + *valp = ui->prstatus->pr_reg.sepc; + break; + default: + Debug(0, "bad regnum:%d\n", regnum); + return -UNW_EINVAL; + } + } #else #error Port me diff --git a/src/ptrace/_UPT_access_fpreg.c b/src/ptrace/_UPT_access_fpreg.c index 7d8eee83..b2ed3c8d 100644 --- a/src/ptrace/_UPT_access_fpreg.c +++ b/src/ptrace/_UPT_access_fpreg.c @@ -93,6 +93,9 @@ _UPT_access_fpreg (unw_addr_space_t as, unw_regnum_t reg, unw_fpreg_t *val, #elif defined(__powerpc__) if ((unsigned) reg < UNW_PPC32_F0 || (unsigned) reg > UNW_PPC32_F31) return -UNW_EBADREG; +#elif defined(__riscv) + if ((unsigned) reg < UNW_RISCV_F0 || (unsigned) reg > UNW_RISCV_F31) + return -UNW_EBADREG; #else #error Fix me #endif @@ -116,6 +119,8 @@ _UPT_access_fpreg (unw_addr_space_t as, unw_regnum_t reg, unw_fpreg_t *val, memcpy(&fpreg.fp_q[reg], val, sizeof(unw_fpreg_t)); #elif defined(__powerpc__) memcpy(&fpreg.fpreg[reg], val, sizeof(unw_fpreg_t)); +#elif defined(__riscv) + memcpy(&fpreg.fp_x[reg], val, sizeof(unw_fpreg_t)); #else #error Fix me #endif @@ -136,6 +141,8 @@ _UPT_access_fpreg (unw_addr_space_t as, unw_regnum_t reg, unw_fpreg_t *val, memcpy(val, &fpreg.fp_q[reg], sizeof(unw_fpreg_t)); #elif defined(__powerpc__) memcpy(val, &fpreg.fpreg[reg], sizeof(unw_fpreg_t)); +#elif defined(__riscv) + memcpy(val, &fpreg.fp_x[reg], sizeof(unw_fpreg_t)); #else #error Fix me #endif diff --git a/src/riscv/offsets.h b/src/riscv/offsets.h index 66a2eef6..eaf03c2c 100644 --- a/src/riscv/offsets.h +++ b/src/riscv/offsets.h @@ -1,5 +1,3 @@ -#ifdef __linux__ - /* Linux-specific definitions: */ /* The RISC-V ucontext has the following structure: @@ -7,7 +5,3 @@ https://github.com/torvalds/linux/blob/44db63d1ad8d71c6932cbe007eb41f31c434d140/arch/riscv/include/uapi/asm/ucontext.h */ #define UC_MCONTEXT_REGS_OFF 176 - -#else -# error "Unsupported OS" -#endif