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53fbef56e0
Patch series "Add and use memdesc_flags_t". At some point struct page will be separated from struct slab and struct folio. This is a step towards that by introducing a type for the 'flags' word of all three structures. This gives us a certain amount of type safety by establishing that some of these unsigned longs are different from other unsigned longs in that they contain things like node ID, section number and zone number in the upper bits. That lets us have functions that can be easily called by anyone who has a slab, folio or page (but not easily by anyone else) to get the node or zone. There's going to be some unusual merge problems with this as some odd bits of the kernel decide they want to print out the flags value or something similar by writing page->flags and now they'll need to write page->flags.f instead. That's most of the churn here. Maybe we should be removing these things from the debug output? This patch (of 11): Wrap the unsigned long flags in a typedef. In upcoming patches, this will provide a strong hint that you can't just pass a random unsigned long to functions which take this as an argument. [willy@infradead.org: s/flags/flags.f/ in several architectures] Link: https://lkml.kernel.org/r/aKMgPRLD-WnkPxYm@casper.infradead.org [nicola.vetrini@gmail.com: mips: fix compilation error] Link: https://lore.kernel.org/lkml/CA+G9fYvkpmqGr6wjBNHY=dRp71PLCoi2341JxOudi60yqaeUdg@mail.gmail.com/ Link: https://lkml.kernel.org/r/20250825214245.1838158-1-nicola.vetrini@gmail.com Link: https://lkml.kernel.org/r/20250805172307.1302730-1-willy@infradead.org Link: https://lkml.kernel.org/r/20250805172307.1302730-2-willy@infradead.org Signed-off-by: Matthew Wilcox (Oracle) <willy@infradead.org> Signed-off-by: Matthew Wilcox (Oracle) <willy@infradead.org> Acked-by: Zi Yan <ziy@nvidia.com> Cc: Shakeel Butt <shakeel.butt@linux.dev> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
108 lines
2.7 KiB
C
108 lines
2.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2015 Regents of the University of California
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*/
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#ifndef _ASM_RISCV_CACHEFLUSH_H
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#define _ASM_RISCV_CACHEFLUSH_H
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#include <linux/mm.h>
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static inline void local_flush_icache_all(void)
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{
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asm volatile ("fence.i" ::: "memory");
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}
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static inline void local_flush_icache_range(unsigned long start,
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unsigned long end)
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{
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local_flush_icache_all();
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}
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#define PG_dcache_clean PG_arch_1
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static inline void flush_dcache_folio(struct folio *folio)
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{
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if (test_bit(PG_dcache_clean, &folio->flags.f))
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clear_bit(PG_dcache_clean, &folio->flags.f);
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}
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#define flush_dcache_folio flush_dcache_folio
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#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
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static inline void flush_dcache_page(struct page *page)
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{
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flush_dcache_folio(page_folio(page));
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}
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#define flush_icache_user_page(vma, pg, addr, len) \
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do { \
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if (vma->vm_flags & VM_EXEC) \
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flush_icache_mm(vma->vm_mm, 0); \
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} while (0)
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#ifdef CONFIG_64BIT
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extern u64 new_vmalloc[NR_CPUS / sizeof(u64) + 1];
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extern char _end[];
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#define flush_cache_vmap flush_cache_vmap
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static inline void flush_cache_vmap(unsigned long start, unsigned long end)
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{
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if (is_vmalloc_or_module_addr((void *)start)) {
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int i;
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/*
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* We don't care if concurrently a cpu resets this value since
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* the only place this can happen is in handle_exception() where
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* an sfence.vma is emitted.
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*/
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for (i = 0; i < ARRAY_SIZE(new_vmalloc); ++i)
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new_vmalloc[i] = -1ULL;
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}
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}
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#define flush_cache_vmap_early(start, end) local_flush_tlb_kernel_range(start, end)
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#endif
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#ifndef CONFIG_SMP
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#define flush_icache_all() local_flush_icache_all()
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#define flush_icache_mm(mm, local) flush_icache_all()
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#else /* CONFIG_SMP */
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void flush_icache_all(void);
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void flush_icache_mm(struct mm_struct *mm, bool local);
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#endif /* CONFIG_SMP */
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/*
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* RISC-V doesn't have an instruction to flush parts of the instruction cache,
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* so instead we just flush the whole thing.
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*/
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#define flush_icache_range flush_icache_range
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static inline void flush_icache_range(unsigned long start, unsigned long end)
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{
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flush_icache_all();
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}
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extern unsigned int riscv_cbom_block_size;
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extern unsigned int riscv_cboz_block_size;
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extern unsigned int riscv_cbop_block_size;
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void riscv_init_cbo_blocksizes(void);
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#ifdef CONFIG_RISCV_DMA_NONCOHERENT
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void riscv_noncoherent_supported(void);
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void __init riscv_set_dma_cache_alignment(void);
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#else
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static inline void riscv_noncoherent_supported(void) {}
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static inline void riscv_set_dma_cache_alignment(void) {}
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#endif
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/*
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* Bits in sys_riscv_flush_icache()'s flags argument.
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*/
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#define SYS_RISCV_FLUSH_ICACHE_LOCAL 1UL
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#define SYS_RISCV_FLUSH_ICACHE_ALL (SYS_RISCV_FLUSH_ICACHE_LOCAL)
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#include <asm-generic/cacheflush.h>
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#endif /* _ASM_RISCV_CACHEFLUSH_H */
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