Andy Shevchenko 5d996132d9 pinctrl: intel: merrifield: Correct UART pin lists ...

UART pin lists consist GPIO numbers which is simply wrong.
Replace it by pin numbers.

Fixes: 4e80c8f505 ("pinctrl: intel: Add Intel Merrifield pin controller support")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

2017-08-07 15:23:11 +02:00

..

Kconfig

pinctrl: intel: Add Intel Cannon Lake PCH pin controller support

2017-06-09 13:03:47 +02:00

Makefile

pinctrl: intel: Add Intel Cannon Lake PCH pin controller support

2017-06-09 13:03:47 +02:00

pinctrl-baytrail.c

Merge tag 'pinctrl-v4.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

2017-02-21 16:34:22 -08:00

pinctrl-broxton.c

pinctrl: broxton: No need to take pointer of a pointer

2017-01-30 14:45:12 +01:00

pinctrl-cannonlake.c

pinctrl: intel: Add Intel Cannon Lake PCH pin controller support

2017-06-09 13:03:47 +02:00

pinctrl-cherryview.c

pinctrl: cherryview: Add Setzer models to the Chromebook DMI quirk

2017-08-03 10:18:34 +02:00

pinctrl-geminilake.c

pinctrl: intel: Add Intel Gemini Lake pin controller support

2017-01-30 15:06:01 +01:00

pinctrl-intel.c

pinctrl: intel: Make it possible to specify mode per pin in a group

2017-06-09 13:02:50 +02:00

pinctrl-intel.h

pinctrl: intel: Make it possible to specify mode per pin in a group

2017-06-09 13:02:50 +02:00

pinctrl-merrifield.c

pinctrl: intel: merrifield: Correct UART pin lists

2017-08-07 15:23:11 +02:00

pinctrl-sunrisepoint.c

pinctrl: intel: Add support for variable size pad groups

2017-06-09 13:01:35 +02:00