Files
linux/drivers
Zhi Mao cd30798a6c pwm: mediatek: Fix PWM source clock selection
In original code, the PWM output frequency is not correct when set
bit<3>=1 to PWMCON register.

Signed-off-by: Zhi Mao <zhi.mao@mediatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: John Crispin <john@phrozen.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-08-21 10:39:09 +02:00
..
2017-07-05 21:46:42 +02:00