Jay Agarwal ff49fad1d9 ARM: tegra30: clocks: Fix pciex clock registration ...

Registering pciex as peripheral clock instead of fixed clock
as tegra_perih_reset_assert(deassert) api of this clock api
gives warning and ultimately does not succeed to assert(deassert)

Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>

2013-06-16 11:25:45 -07:00

..

clk-audio-sync.c

…

clk-divider.c

…

clk-periph-gate.c

clk: tegra: Workaround for Tegra114 MSENC problem

2013-04-04 16:10:59 -06:00

clk-periph.c

clk: tegra: Add flags to tegra_clk_periph()

2013-04-04 16:10:56 -06:00

clk-pll-out.c

…

clk-pll.c

clk: tegra: Add new fields and PLL types for Tegra114

2013-04-04 16:10:52 -06:00

clk-super.c

clk: tegra: Implement locking for super clock

2013-02-12 10:29:12 -07:00

clk-tegra20.c

clk: tegra: add ac97 controller clock

2013-05-20 23:24:34 -07:00

clk-tegra30.c

ARM: tegra30: clocks: Fix pciex clock registration

2013-06-16 11:25:45 -07:00

clk-tegra114.c

clk: tegra: fix enum tegra114_clk to match binding

2013-04-04 17:17:14 -06:00

clk.c

clk: tegra: devicetree match for nvidia,tegra114-car

2013-04-04 17:17:13 -06:00

clk.h

clk: tegra: devicetree match for nvidia,tegra114-car

2013-04-04 17:17:13 -06:00

Makefile

clk: tegra: Implement clocks for Tegra114

2013-04-04 17:17:12 -06:00