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c3339bae0e
Support pmulld (packed multiply 32-bit doubleword integers) instruction in guest_x86_toIR.c and host_x86_isel.c. Add test function to sse4-common.h and update none/tests/x86/sse4-x86.c to test the instruction. BZ: https://bugs.kde.org/show_bug.cgi?id=513475
355 lines
8.9 KiB
C
355 lines
8.9 KiB
C
/* Common infrastructure for SSE4 tests (both x86 and amd64) */
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#ifndef __SSE4_COMMON_H
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#define __SSE4_COMMON_H
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#include <stdio.h>
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#include <stdlib.h>
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#include <assert.h>
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#include "tests/malloc.h"
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#include <string.h>
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typedef unsigned char V128[16];
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typedef unsigned int UInt;
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typedef signed int Int;
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typedef unsigned char UChar;
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typedef unsigned long long int ULong;
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typedef unsigned char Bool;
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#define False ((Bool)0)
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#define True ((Bool)1)
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typedef
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struct {
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V128 arg1;
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V128 arg2;
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V128 res;
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}
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RRArgs;
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typedef
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struct {
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V128 arg1;
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V128 res;
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}
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RMArgs;
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static UChar randUChar ( void )
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{
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static UInt seed = 80021;
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seed = 1103515245 * seed + 12345;
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return (seed >> 17) & 0xFF;
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}
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static ULong randULong ( void )
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{
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Int i;
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ULong r = 0;
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for (i = 0; i < 8; i++) {
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r = (r << 8) | (ULong)(0xFF & randUChar());
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}
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return r;
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}
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static void randV128 ( V128* v )
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{
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Int i;
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for (i = 0; i < 16; i++)
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(*v)[i] = randUChar();
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}
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static void showV128 ( V128* v )
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{
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Int i;
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for (i = 15; i >= 0; i--)
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printf("%02x", (Int)(*v)[i]);
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}
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static void showMaskedV128 ( V128* v, V128* mask )
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{
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Int i;
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for (i = 15; i >= 0; i--)
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printf("%02x", (Int)( ((*v)[i]) & ((*mask)[i]) ));
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}
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static void do64HLtoV128 ( /*OUT*/V128* res, ULong wHi, ULong wLo )
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{
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// try to sidestep strict-aliasing snafus by memcpying explicitly
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UChar* p = (UChar*)res;
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memcpy(&p[8], (UChar*)&wHi, 8);
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memcpy(&p[0], (UChar*)&wLo, 8);
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}
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static void showIGVV( char* rOrM, char* op, Int imm,
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ULong src64, V128* dst, V128* res )
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{
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printf("%s %10s $%d ", rOrM, op, imm);
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printf("%016llx", src64);
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printf(" ");
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showV128(dst);
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printf(" ");
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showV128(res);
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printf("\n");
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}
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static void showIAG ( char* rOrM, char* op, Int imm,
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V128* argL, ULong argR, ULong res )
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{
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printf("%s %10s $%d ", rOrM, op, imm);
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showV128(argL);
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printf(" ");
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printf("%016llx", argR);
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printf(" ");
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printf("%016llx", res);
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printf("\n");
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}
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static void showIAA ( char* rOrM, char* op, Int imm, RRArgs* rra, V128* rmask )
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{
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printf("%s %10s $%d ", rOrM, op, imm);
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showV128(&rra->arg1);
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printf(" ");
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showV128(&rra->arg2);
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printf(" ");
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showMaskedV128(&rra->res, rmask);
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printf("\n");
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}
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static void showAA ( char* rOrM, char* op, RRArgs* rra, V128* rmask )
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{
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printf("%s %10s ", rOrM, op);
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showV128(&rra->arg1);
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printf(" ");
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showV128(&rra->arg2);
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printf(" ");
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showMaskedV128(&rra->res, rmask);
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printf("\n");
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}
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/* Note: these are little endian. Hence first byte is the least
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significant byte of lane zero. */
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/* Mask for insns where all result bits are non-approximated. */
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static V128 AllMask = { 0xFF,0xFF,0xFF,0xFF, 0xFF,0xFF,0xFF,0xFF,
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0xFF,0xFF,0xFF,0xFF, 0xFF,0xFF,0xFF,0xFF };
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/* Mark for insns which produce approximated vector short results. */
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__attribute__((unused))
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static V128 ApproxPS = { 0x00,0x00,0x80,0xFF, 0x00,0x00,0x80,0xFF,
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0x00,0x00,0x80,0xFF, 0x00,0x00,0x80,0xFF };
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/* Mark for insns which produce approximated scalar short results. */
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__attribute__((unused))
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static V128 ApproxSS = { 0x00,0x00,0x80,0xFF, 0xFF,0xFF,0xFF,0xFF,
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0xFF,0xFF,0xFF,0xFF, 0xFF,0xFF,0xFF,0xFF };
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static V128 fives = { 0x55,0x55,0x55,0x55, 0x55,0x55,0x55,0x55,
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0x55,0x55,0x55,0x55, 0x55,0x55,0x55,0x55 };
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static V128 zeroes = { 0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,
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0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00 };
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/* Helper functions for creating special float values */
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static inline double mkPosInf ( void ) { return 1.0 / 0.0; }
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static inline double mkNegInf ( void ) { return -mkPosInf(); }
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static inline double mkPosNan ( void ) { return 0.0 / 0.0; }
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static inline double mkNegNan ( void ) { return -mkPosNan(); }
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/* Macros for testing XMM register to register and memory to register operations */
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/* Use xmm7 for 32-bit x86, xmm11 for amd64 (xmm8-15 don't exist in 32-bit mode) */
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#ifdef __x86_64__
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#define XMMREG_DST "xmm11"
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#else
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#define XMMREG_DST "xmm7"
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#endif
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#define DO_imm_r_r(_opname, _imm, _src, _dst) \
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{ \
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V128 _tmp; \
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__asm__ __volatile__( \
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"movupd (%0), %%xmm2" "\n\t" \
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"movupd (%1), %%" XMMREG_DST "\n\t" \
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_opname " $" #_imm ", %%xmm2, %%" XMMREG_DST "\n\t" \
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"movupd %%" XMMREG_DST ", (%2)" "\n" \
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: /*out*/ : /*in*/ "r"(&(_src)), "r"(&(_dst)), "r"(&(_tmp)) \
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: "cc", "memory", "xmm2", XMMREG_DST \
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); \
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RRArgs rra; \
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memcpy(&rra.arg1, &(_src), sizeof(V128)); \
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memcpy(&rra.arg2, &(_dst), sizeof(V128)); \
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memcpy(&rra.res, &(_tmp), sizeof(V128)); \
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showIAA("r", (_opname), (_imm), &rra, &AllMask); \
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}
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#define DO_imm_m_r(_opname, _imm, _src, _dst) \
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{ \
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V128 _tmp; \
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V128* _srcM = memalign16(sizeof(V128)); \
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memcpy(_srcM, &(_src), sizeof(V128)); \
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__asm__ __volatile__( \
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"movupd (%1), %%" XMMREG_DST "\n\t" \
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_opname " $" #_imm ", (%0), %%" XMMREG_DST "\n\t" \
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"movupd %%" XMMREG_DST ", (%2)" "\n" \
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: /*out*/ : /*in*/ "r"(_srcM), "r"(&(_dst)), "r"(&(_tmp)) \
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: "cc", "memory", XMMREG_DST \
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); \
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RRArgs rra; \
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memcpy(&rra.arg1, &(_src), sizeof(V128)); \
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memcpy(&rra.arg2, &(_dst), sizeof(V128)); \
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memcpy(&rra.res, &(_tmp), sizeof(V128)); \
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showIAA("m", (_opname), (_imm), &rra, &AllMask); \
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free(_srcM); \
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}
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#define DO_imm_mandr_r(_opname, _imm, _src, _dst) \
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DO_imm_r_r( _opname, _imm, _src, _dst ) \
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DO_imm_m_r( _opname, _imm, _src, _dst )
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#define DO_r_r(_opname, _src, _dst) \
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{ \
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V128 _tmp; \
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__asm__ __volatile__( \
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"movupd (%0), %%xmm2" "\n\t" \
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"movupd (%1), %%" XMMREG_DST "\n\t" \
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_opname " %%xmm2, %%" XMMREG_DST "\n\t" \
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"movupd %%" XMMREG_DST ", (%2)" "\n" \
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: /*out*/ : /*in*/ "r"(&(_src)), "r"(&(_dst)), "r"(&(_tmp)) \
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: "cc", "memory", "xmm2", XMMREG_DST \
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); \
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RRArgs rra; \
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memcpy(&rra.arg1, &(_src), sizeof(V128)); \
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memcpy(&rra.arg2, &(_dst), sizeof(V128)); \
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memcpy(&rra.res, &(_tmp), sizeof(V128)); \
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showAA("r", (_opname), &rra, &AllMask); \
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}
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#define DO_m_r(_opname, _src, _dst) \
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{ \
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V128 _tmp; \
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V128* _srcM = memalign16(sizeof(V128)); \
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memcpy(_srcM, &(_src), sizeof(V128)); \
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__asm__ __volatile__( \
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"movupd (%1), %%" XMMREG_DST "\n\t" \
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_opname " (%0), %%" XMMREG_DST "\n\t" \
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"movupd %%" XMMREG_DST ", (%2)" "\n" \
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: /*out*/ : /*in*/ "r"(_srcM), "r"(&(_dst)), "r"(&(_tmp)) \
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: "cc", "memory", XMMREG_DST \
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); \
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RRArgs rra; \
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memcpy(&rra.arg1, &(_src), sizeof(V128)); \
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memcpy(&rra.arg2, &(_dst), sizeof(V128)); \
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memcpy(&rra.res, &(_tmp), sizeof(V128)); \
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showAA("m", (_opname), &rra, &AllMask); \
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free(_srcM); \
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}
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#define DO_mandr_r(_opname, _src, _dst) \
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DO_r_r(_opname, _src, _dst) \
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DO_m_r(_opname, _src, _dst)
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/* Common test functions */
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static inline void test_PMAXSD ( void )
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{
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V128 src, dst;
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Int i;
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for (i = 0; i < 10; i++) {
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randV128(&src);
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randV128(&dst);
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DO_mandr_r("pmaxsd", src, dst);
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}
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}
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static inline void test_PMINSD ( void )
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{
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V128 src, dst;
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Int i;
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for (i = 0; i < 10; i++) {
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randV128(&src);
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randV128(&dst);
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DO_mandr_r("pminsd", src, dst);
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}
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}
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static inline void test_PMAXSB ( void )
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{
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V128 src, dst;
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Int i;
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for (i = 0; i < 10; i++) {
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randV128(&src);
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randV128(&dst);
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DO_mandr_r("pmaxsb", src, dst);
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}
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}
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static inline void test_PMAXUD ( void )
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{
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V128 src, dst;
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Int i;
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for (i = 0; i < 10; i++) {
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randV128(&src);
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randV128(&dst);
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DO_mandr_r("pmaxud", src, dst);
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}
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}
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static inline void test_PMAXUW ( void )
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{
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V128 src, dst;
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Int i;
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for (i = 0; i < 10; i++) {
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randV128(&src);
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randV128(&dst);
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DO_mandr_r("pmaxuw", src, dst);
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}
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}
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static inline void test_PMINSB ( void )
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{
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V128 src, dst;
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Int i;
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for (i = 0; i < 10; i++) {
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randV128(&src);
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randV128(&dst);
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DO_mandr_r("pminsb", src, dst);
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}
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}
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static inline void test_PMINUD ( void )
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{
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V128 src, dst;
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Int i;
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for (i = 0; i < 10; i++) {
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randV128(&src);
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randV128(&dst);
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DO_mandr_r("pminud", src, dst);
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}
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}
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static inline void test_PMINUW ( void )
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{
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V128 src, dst;
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Int i;
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for (i = 0; i < 10; i++) {
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randV128(&src);
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randV128(&dst);
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DO_mandr_r("pminuw", src, dst);
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}
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}
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static inline void test_PMULLD ( void )
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{
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V128 src, dst;
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Int i;
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for (i = 0; i < 10; i++) {
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randV128(&src);
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randV128(&dst);
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DO_mandr_r("pmulld", src, dst);
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}
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}
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#endif /* __SSE4_COMMON_H */
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