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drm/bridge: it6505: add I2C functionality on AUX
DisplayPort AUX protocol supports I2C transport which is capable of reading EDID or supports MCCS. In drm_dp_helper, drm_dp_i2c_xfer() packs I2C requests into a sequence of AUX requests. it6505_aux_i2c_operation() is implemented to match drm_dp_i2c_xfer() operactions. it6505_aux_i2c_transfer() adds I2C functionality for it6505_aux_transfer(). Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Hermes Wu <hermes.wu@ite.com.tw> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20241230-v7-upstream-v7-10-e0fdd4844703@ite.corp-partner.google.com
This commit is contained in:
Hermes Wu
committed by
Dmitry Baryshkov
Dmitry Baryshkov
parent
9f9eef9ec1
commit
041d61ad66
@@ -268,6 +268,18 @@
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#define REG_SSC_CTRL1 0x189
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#define REG_SSC_CTRL2 0x18A
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#define REG_AUX_USER_CTRL 0x190
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#define EN_USER_AUX BIT(0)
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#define USER_AUX_DONE BIT(1)
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#define AUX_EVENT BIT(4)
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#define REG_AUX_USER_DATA_REC 0x191
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#define M_AUX_IN_REC 0xF0
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#define M_AUX_OUT_REC 0x0F
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#define REG_AUX_USER_REPLY 0x19A
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#define REG_AUX_USER_RXB(n) (n + 0x19B)
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#define RBR DP_LINK_BW_1_62
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#define HBR DP_LINK_BW_2_7
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#define HBR2 DP_LINK_BW_5_4
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@@ -303,6 +315,8 @@
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#define MAX_EQ_LEVEL 0x03
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#define AUX_WAIT_TIMEOUT_MS 15
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#define AUX_FIFO_MAX_SIZE 16
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#define AUX_I2C_MAX_SIZE 4
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#define AUX_I2C_DEFER_RETRY 4
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#define PIXEL_CLK_DELAY 1
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#define PIXEL_CLK_INVERSE 0
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#define ADJUST_PHASE_THRESHOLD 80000
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@@ -325,7 +339,12 @@
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enum aux_cmd_type {
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CMD_AUX_NATIVE_READ = 0x0,
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CMD_AUX_NATIVE_WRITE = 0x5,
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CMD_AUX_GI2C_ADR = 0x08,
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CMD_AUX_GI2C_READ = 0x09,
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CMD_AUX_GI2C_WRITE = 0x0A,
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CMD_AUX_I2C_EDID_READ = 0xB,
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CMD_AUX_I2C_READ = 0x0D,
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CMD_AUX_I2C_WRITE = 0x0C,
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/* KSV read with AUX FIFO extend from CMD_AUX_NATIVE_READ*/
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CMD_AUX_GET_KSV_LIST = 0x10,
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@@ -1107,6 +1126,161 @@ aux_op_err:
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return ret;
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}
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static bool it6505_aux_i2c_reply_defer(u8 reply)
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{
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if (reply == DP_AUX_NATIVE_REPLY_DEFER || reply == DP_AUX_I2C_REPLY_DEFER)
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return true;
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return false;
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}
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static bool it6505_aux_i2c_reply_nack(u8 reply)
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{
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if (reply == DP_AUX_NATIVE_REPLY_NACK || reply == DP_AUX_I2C_REPLY_NACK)
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return true;
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return false;
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}
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static int it6505_aux_i2c_wait(struct it6505 *it6505, u8 *reply)
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{
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int err = 0;
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unsigned long timeout;
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struct device *dev = it6505->dev;
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timeout = jiffies + msecs_to_jiffies(AUX_WAIT_TIMEOUT_MS) + 1;
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do {
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if (it6505_read(it6505, REG_AUX_USER_CTRL) & AUX_EVENT)
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break;
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if (time_after(jiffies, timeout)) {
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dev_err(dev, "Timed out waiting AUX I2C, BUSY = %X\n",
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it6505_aux_op_finished(it6505));
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err = -ETIMEDOUT;
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goto end_aux_i2c_wait;
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}
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usleep_range(300, 800);
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} while (!it6505_aux_op_finished(it6505));
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*reply = it6505_read(it6505, REG_AUX_USER_REPLY) >> 4;
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if (*reply == 0)
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goto end_aux_i2c_wait;
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if (it6505_aux_i2c_reply_defer(*reply))
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err = -EBUSY;
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else if (it6505_aux_i2c_reply_nack(*reply))
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err = -ENXIO;
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end_aux_i2c_wait:
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it6505_set_bits(it6505, REG_AUX_USER_CTRL, USER_AUX_DONE, USER_AUX_DONE);
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return err;
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}
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static int it6505_aux_i2c_readb(struct it6505 *it6505, u8 *buf, size_t size, u8 *reply)
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{
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int ret, i;
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int retry;
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for (retry = 0; retry < AUX_I2C_DEFER_RETRY; retry++) {
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it6505_write(it6505, REG_AUX_CMD_REQ, CMD_AUX_GI2C_READ);
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ret = it6505_aux_i2c_wait(it6505, reply);
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if (it6505_aux_i2c_reply_defer(*reply))
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continue;
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if (ret >= 0)
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break;
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}
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for (i = 0; i < size; i++)
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buf[i] = it6505_read(it6505, REG_AUX_USER_RXB(0 + i));
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return size;
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}
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static int it6505_aux_i2c_writeb(struct it6505 *it6505, u8 *buf, size_t size, u8 *reply)
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{
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int i, ret;
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int retry;
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for (i = 0; i < size; i++)
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it6505_write(it6505, REG_AUX_OUT_DATA0 + i, buf[i]);
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for (retry = 0; retry < AUX_I2C_DEFER_RETRY; retry++) {
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it6505_write(it6505, REG_AUX_CMD_REQ, CMD_AUX_GI2C_WRITE);
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ret = it6505_aux_i2c_wait(it6505, reply);
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if (it6505_aux_i2c_reply_defer(*reply))
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continue;
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if (ret >= 0)
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break;
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}
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return size;
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}
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static ssize_t it6505_aux_i2c_operation(struct it6505 *it6505,
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struct drm_dp_aux_msg *msg)
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{
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int ret;
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ssize_t request_size, data_cnt = 0;
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u8 *buffer = msg->buffer;
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/* set AUX user mode */
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it6505_set_bits(it6505, REG_AUX_CTRL,
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AUX_USER_MODE | AUX_NO_SEGMENT_WR, AUX_USER_MODE);
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it6505_set_bits(it6505, REG_AUX_USER_CTRL, EN_USER_AUX, EN_USER_AUX);
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/* clear AUX FIFO */
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it6505_set_bits(it6505, REG_AUX_CTRL,
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AUX_EN_FIFO_READ | CLR_EDID_FIFO,
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AUX_EN_FIFO_READ | CLR_EDID_FIFO);
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it6505_set_bits(it6505, REG_AUX_CTRL,
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AUX_EN_FIFO_READ | CLR_EDID_FIFO, 0x00);
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it6505_write(it6505, REG_AUX_ADR_0_7, 0x00);
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it6505_write(it6505, REG_AUX_ADR_8_15, msg->address << 1);
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if (msg->size == 0) {
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/* IIC Start/STOP dummy write */
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it6505_write(it6505, REG_AUX_ADR_16_19, msg->request);
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it6505_write(it6505, REG_AUX_CMD_REQ, CMD_AUX_GI2C_ADR);
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ret = it6505_aux_i2c_wait(it6505, &msg->reply);
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goto end_aux_i2c_transfer;
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}
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/* IIC data transfer */
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data_cnt = 0;
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do {
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request_size = min_t(ssize_t, msg->size - data_cnt, AUX_I2C_MAX_SIZE);
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it6505_write(it6505, REG_AUX_ADR_16_19,
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msg->request | ((request_size - 1) << 4));
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if ((msg->request & DP_AUX_I2C_READ) == DP_AUX_I2C_READ)
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ret = it6505_aux_i2c_readb(it6505, &buffer[data_cnt],
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request_size, &msg->reply);
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else
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ret = it6505_aux_i2c_writeb(it6505, &buffer[data_cnt],
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request_size, &msg->reply);
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if (ret < 0)
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goto end_aux_i2c_transfer;
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data_cnt += request_size;
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} while (data_cnt < msg->size);
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ret = data_cnt;
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end_aux_i2c_transfer:
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it6505_set_bits(it6505, REG_AUX_USER_CTRL, EN_USER_AUX, 0);
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it6505_set_bits(it6505, REG_AUX_CTRL, AUX_USER_MODE, 0);
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return ret;
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}
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static ssize_t it6505_aux_i2c_transfer(struct drm_dp_aux *aux,
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struct drm_dp_aux_msg *msg)
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{
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struct it6505 *it6505 = container_of(aux, struct it6505, aux);
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guard(mutex)(&it6505->aux_lock);
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return it6505_aux_i2c_operation(it6505, msg);
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}
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static ssize_t it6505_aux_transfer(struct drm_dp_aux *aux,
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struct drm_dp_aux_msg *msg)
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{
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@@ -1116,9 +1290,8 @@ static ssize_t it6505_aux_transfer(struct drm_dp_aux *aux,
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int ret;
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enum aux_cmd_reply reply;
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/* IT6505 doesn't support arbitrary I2C read / write. */
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if (is_i2c)
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return -EINVAL;
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return it6505_aux_i2c_transfer(aux, msg);
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switch (msg->request) {
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case DP_AUX_NATIVE_READ:
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