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phy: exynos5-usbdrd: fix EDS distribution tuning (gs101)

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This code's intention is to configure lane0 and lane2 tunings, but for
lane2 there is a typo and it ends up tuning something else.

Fix the typo, as it doesn't appear to make sense to apply different
tunings for lane0 vs lane2.

The same typo appears to exist in the bootloader, hence we restore the
original value in the typo'd registers as well. This can be removed
once / if the bootloader is updated.

Note that this is incorrect in the downstream driver as well - the
values had been copied from there.

Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Tested-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: André Draszik <andre.draszik@linaro.org>
Tested-by: Will McVicker <willmcvicker@google.com>
Link: https://lore.kernel.org/r/20241206-gs101-phy-lanes-orientation-phy-v4-4-f5961268b149@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
André Draszik
2024-12-06 16:31:04 +00:00
committed by Vinod Koul
parent ee064390b8
commit 21860f340b
1 changed files with 5 additions and 2 deletions
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7
drivers/phy/samsung/phy-exynos5-usbdrd.c
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@@ -1510,8 +1510,11 @@ static const struct exynos5_usbdrd_phy_tuning gs101_tunes_pipe3_preinit[] = {
PHY_TUNING_ENTRY_PMA(0x09e0, -1, 0x00),
PHY_TUNING_ENTRY_PMA(0x09e4, -1, 0x36),
PHY_TUNING_ENTRY_PMA(0x1e7c, -1, 0x06),
PHY_TUNING_ENTRY_PMA(0x1e90, -1, 0x00),
PHY_TUNING_ENTRY_PMA(0x1e94, -1, 0x36),
PHY_TUNING_ENTRY_PMA(0x19e0, -1, 0x00),
PHY_TUNING_ENTRY_PMA(0x19e4, -1, 0x36),
/* fix bootloader bug */
PHY_TUNING_ENTRY_PMA(0x1e90, -1, 0x02),
PHY_TUNING_ENTRY_PMA(0x1e94, -1, 0x0b),
/* improve LVCC */
PHY_TUNING_ENTRY_PMA(0x08f0, -1, 0x30),
PHY_TUNING_ENTRY_PMA(0x18f0, -1, 0x30),