breeze/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-01-12 00:42:35 +08:00
Code Issues Packages Projects Releases Wiki Activity

media: c8sectpfe: remove support of STi c8sectpfe driver

Browse Source 
STi c8sectpfe device is only used on B2120 boards, which support has
been withdrawn in commit dee546e1ad ("ARM: sti: drop B2120 board
support").

Signed-off-by: Raphael Gallais-Pou <rgallaispou@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
This commit is contained in:
Raphael Gallais-Pou
2025-09-12 13:36:08 +02:00
committed by Hans Verkuil
parent 2a0935ac4b
commit 2282f76107
14 changed files with 0 additions and 2329 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
MAINTAINERS
View File

@@ -3437,7 +3437,6 @@ F: drivers/clocksource/clksrc_st_lpc.c
F: drivers/cpufreq/sti-cpufreq.c
F: drivers/dma/st_fdma*
F: drivers/i2c/busses/i2c-st.c
F: drivers/media/platform/st/sti/c8sectpfe/
F: drivers/media/rc/st_rc.c
F: drivers/mmc/host/sdhci-st.c
F: drivers/phy/st/phy-miphy28lp.c

1
drivers/media/platform/st/Makefile
View File

@@ -1,7 +1,6 @@
# SPDX-License-Identifier: GPL-2.0-only
obj-y += sti/bdisp/
obj-y += sti/c8sectpfe/
obj-y += sti/delta/
obj-y += sti/hva/
obj-y += stm32/

1
drivers/media/platform/st/sti/Kconfig
View File

@@ -1,5 +1,4 @@
# SPDX-License-Identifier: GPL-2.0-only
source "drivers/media/platform/st/sti/bdisp/Kconfig"
source "drivers/media/platform/st/sti/c8sectpfe/Kconfig"
source "drivers/media/platform/st/sti/delta/Kconfig"
source "drivers/media/platform/st/sti/hva/Kconfig"

1
drivers/media/platform/st/sti/Makefile
View File

@@ -1,6 +1,5 @@
# SPDX-License-Identifier: GPL-2.0-only
obj-y += bdisp/
obj-y += c8sectpfe/
obj-y += delta/
obj-y += hva/
obj-y += stm32/

28
drivers/media/platform/st/sti/c8sectpfe/Kconfig
View File

@@ -1,28 +0,0 @@
# SPDX-License-Identifier: GPL-2.0-only
config DVB_C8SECTPFE
tristate "STMicroelectronics C8SECTPFE DVB support"
depends on DVB_PLATFORM_DRIVERS
depends on PINCTRL && DVB_CORE && I2C
depends on ARCH_STI || ARCH_MULTIPLATFORM || COMPILE_TEST
select FW_LOADER
select DVB_LNBP21 if MEDIA_SUBDRV_AUTOSELECT
select DVB_STV090x if MEDIA_SUBDRV_AUTOSELECT
select DVB_STB6100 if MEDIA_SUBDRV_AUTOSELECT
select DVB_STV6110 if MEDIA_SUBDRV_AUTOSELECT
select DVB_STV0900 if MEDIA_SUBDRV_AUTOSELECT
select DVB_STV0367 if MEDIA_SUBDRV_AUTOSELECT
select MEDIA_TUNER_TDA18212 if MEDIA_SUBDRV_AUTOSELECT
help
This adds support for DVB front-end cards connected
to TS inputs of STiH407/410 SoC.
The driver currently supports C8SECTPFE's TS input block,
memdma engine, and HW PID filtering.
Supported DVB front-end cards are:
- STMicroelectronics DVB-T B2100A (STV0367 + TDA18212)
- STMicroelectronics DVB-S/S2 STV0903 + STV6110 + LNBP24 board
To compile this driver as a module, choose M here: the
module will be called c8sectpfe.

11
drivers/media/platform/st/sti/c8sectpfe/Makefile
View File

@@ -1,11 +0,0 @@
# SPDX-License-Identifier: GPL-2.0
c8sectpfe-y += c8sectpfe-core.o c8sectpfe-common.o c8sectpfe-dvb.o
ifneq ($(CONFIG_DEBUG_FS),)
c8sectpfe-y += c8sectpfe-debugfs.o
endif
obj-$(CONFIG_DVB_C8SECTPFE) += c8sectpfe.o
ccflags-y += -I $(srctree)/drivers/media/dvb-frontends/
ccflags-y += -I $(srctree)/drivers/media/tuners/

262
drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-common.c
View File

@@ -1,262 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/*
* c8sectpfe-common.c - C8SECTPFE STi DVB driver
*
* Copyright (c) STMicroelectronics 2015
*
* Author: Peter Griffin <peter.griffin@linaro.org>
*
*/
#include <linux/completion.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/dvb/dmx.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/ioport.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/time.h>
#include <linux/wait.h>
#include <media/dmxdev.h>
#include <media/dvbdev.h>
#include <media/dvb_demux.h>
#include <media/dvb_frontend.h>
#include <media/dvb_net.h>
#include "c8sectpfe-common.h"
#include "c8sectpfe-core.h"
#include "c8sectpfe-dvb.h"
static int register_dvb(struct stdemux *demux, struct dvb_adapter *adap,
void *start_feed, void *stop_feed,
struct c8sectpfei *fei)
{
int result;
demux->dvb_demux.dmx.capabilities = DMX_TS_FILTERING |
DMX_SECTION_FILTERING |
DMX_MEMORY_BASED_FILTERING;
demux->dvb_demux.priv = demux;
demux->dvb_demux.filternum = C8SECTPFE_MAXCHANNEL;
demux->dvb_demux.feednum = C8SECTPFE_MAXCHANNEL;
demux->dvb_demux.start_feed = start_feed;
demux->dvb_demux.stop_feed = stop_feed;
demux->dvb_demux.write_to_decoder = NULL;
result = dvb_dmx_init(&demux->dvb_demux);
if (result < 0) {
dev_err(fei->dev, "dvb_dmx_init failed (errno = %d)\n",
result);
goto err_dmx;
}
demux->dmxdev.filternum = demux->dvb_demux.filternum;
demux->dmxdev.demux = &demux->dvb_demux.dmx;
demux->dmxdev.capabilities = 0;
result = dvb_dmxdev_init(&demux->dmxdev, adap);
if (result < 0) {
dev_err(fei->dev, "dvb_dmxdev_init failed (errno = %d)\n",
result);
goto err_dmxdev;
}
demux->hw_frontend.source = DMX_FRONTEND_0 + demux->tsin_index;
result = demux->dvb_demux.dmx.add_frontend(&demux->dvb_demux.dmx,
&demux->hw_frontend);
if (result < 0) {
dev_err(fei->dev, "add_frontend failed (errno = %d)\n", result);
goto err_fe_hw;
}
demux->mem_frontend.source = DMX_MEMORY_FE;
result = demux->dvb_demux.dmx.add_frontend(&demux->dvb_demux.dmx,
&demux->mem_frontend);
if (result < 0) {
dev_err(fei->dev, "add_frontend failed (%d)\n", result);
goto err_fe_mem;
}
result = demux->dvb_demux.dmx.connect_frontend(&demux->dvb_demux.dmx,
&demux->hw_frontend);
if (result < 0) {
dev_err(fei->dev, "connect_frontend (%d)\n", result);
goto err_fe_con;
}
return 0;
err_fe_con:
demux->dvb_demux.dmx.remove_frontend(&demux->dvb_demux.dmx,
&demux->mem_frontend);
err_fe_mem:
demux->dvb_demux.dmx.remove_frontend(&demux->dvb_demux.dmx,
&demux->hw_frontend);
err_fe_hw:
dvb_dmxdev_release(&demux->dmxdev);
err_dmxdev:
dvb_dmx_release(&demux->dvb_demux);
err_dmx:
return result;
}
static void unregister_dvb(struct stdemux *demux)
{
demux->dvb_demux.dmx.remove_frontend(&demux->dvb_demux.dmx,
&demux->mem_frontend);
demux->dvb_demux.dmx.remove_frontend(&demux->dvb_demux.dmx,
&demux->hw_frontend);
dvb_dmxdev_release(&demux->dmxdev);
dvb_dmx_release(&demux->dvb_demux);
}
static struct c8sectpfe *c8sectpfe_create(struct c8sectpfei *fei,
void *start_feed,
void *stop_feed)
{
struct c8sectpfe *c8sectpfe;
int result;
int i, j;
short int ids[] = { -1 };
c8sectpfe = kzalloc(sizeof(struct c8sectpfe), GFP_KERNEL);
if (!c8sectpfe)
goto err1;
mutex_init(&c8sectpfe->lock);
c8sectpfe->device = fei->dev;
result = dvb_register_adapter(&c8sectpfe->adapter, "STi c8sectpfe",
THIS_MODULE, fei->dev, ids);
if (result < 0) {
dev_err(fei->dev, "dvb_register_adapter failed (errno = %d)\n",
result);
goto err2;
}
c8sectpfe->adapter.priv = fei;
for (i = 0; i < fei->tsin_count; i++) {
c8sectpfe->demux[i].tsin_index = i;
c8sectpfe->demux[i].c8sectpfei = fei;
result = register_dvb(&c8sectpfe->demux[i], &c8sectpfe->adapter,
start_feed, stop_feed, fei);
if (result < 0) {
dev_err(fei->dev,
"register_dvb feed=%d failed (errno = %d)\n",
result, i);
/* we take a all or nothing approach */
for (j = 0; j < i; j++)
unregister_dvb(&c8sectpfe->demux[j]);
goto err3;
}
}
c8sectpfe->num_feeds = fei->tsin_count;
return c8sectpfe;
err3:
dvb_unregister_adapter(&c8sectpfe->adapter);
err2:
kfree(c8sectpfe);
err1:
return NULL;
};
static void c8sectpfe_delete(struct c8sectpfe *c8sectpfe)
{
int i;
if (!c8sectpfe)
return;
for (i = 0; i < c8sectpfe->num_feeds; i++)
unregister_dvb(&c8sectpfe->demux[i]);
dvb_unregister_adapter(&c8sectpfe->adapter);
kfree(c8sectpfe);
};
void c8sectpfe_tuner_unregister_frontend(struct c8sectpfe *c8sectpfe,
struct c8sectpfei *fei)
{
int n;
struct channel_info *tsin;
for (n = 0; n < fei->tsin_count; n++) {
tsin = fei->channel_data[n];
if (tsin) {
if (tsin->frontend) {
dvb_unregister_frontend(tsin->frontend);
dvb_frontend_detach(tsin->frontend);
}
i2c_put_adapter(tsin->i2c_adapter);
if (tsin->i2c_client) {
module_put(tsin->i2c_client->dev.driver->owner);
i2c_unregister_device(tsin->i2c_client);
}
}
}
c8sectpfe_delete(c8sectpfe);
};
int c8sectpfe_tuner_register_frontend(struct c8sectpfe **c8sectpfe,
struct c8sectpfei *fei,
void *start_feed,
void *stop_feed)
{
struct channel_info *tsin;
struct dvb_frontend *frontend;
int n, res;
*c8sectpfe = c8sectpfe_create(fei, start_feed, stop_feed);
if (!*c8sectpfe)
return -ENOMEM;
for (n = 0; n < fei->tsin_count; n++) {
tsin = fei->channel_data[n];
res = c8sectpfe_frontend_attach(&frontend, *c8sectpfe, tsin, n);
if (res)
goto err;
res = dvb_register_frontend(&c8sectpfe[0]->adapter, frontend);
if (res < 0) {
dev_err(fei->dev, "dvb_register_frontend failed (%d)\n",
res);
goto err;
}
tsin->frontend = frontend;
}
return 0;
err:
c8sectpfe_tuner_unregister_frontend(*c8sectpfe, fei);
return res;
}

60
drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-common.h
View File

@@ -1,60 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* c8sectpfe-common.h - C8SECTPFE STi DVB driver
*
* Copyright (c) STMicroelectronics 2015
*
* Author: Peter Griffin <peter.griffin@linaro.org>
*
*/
#ifndef _C8SECTPFE_COMMON_H_
#define _C8SECTPFE_COMMON_H_
#include <linux/dvb/dmx.h>
#include <linux/dvb/frontend.h>
#include <linux/gpio.h>
#include <media/dmxdev.h>
#include <media/dvb_demux.h>
#include <media/dvb_frontend.h>
#include <media/dvb_net.h>
/* Maximum number of channels */
#define C8SECTPFE_MAXADAPTER (4)
#define C8SECTPFE_MAXCHANNEL 64
#define STPTI_MAXCHANNEL 64
#define MAX_INPUTBLOCKS 7
struct c8sectpfe;
struct stdemux;
struct stdemux {
struct dvb_demux dvb_demux;
struct dmxdev dmxdev;
struct dmx_frontend hw_frontend;
struct dmx_frontend mem_frontend;
int tsin_index;
int running_feed_count;
struct c8sectpfei *c8sectpfei;
};
struct c8sectpfe {
struct stdemux demux[MAX_INPUTBLOCKS];
struct mutex lock;
struct dvb_adapter adapter;
struct device *device;
int mapping;
int num_feeds;
};
/* Channel registration */
int c8sectpfe_tuner_register_frontend(struct c8sectpfe **c8sectpfe,
struct c8sectpfei *fei,
void *start_feed,
void *stop_feed);
void c8sectpfe_tuner_unregister_frontend(struct c8sectpfe *c8sectpfe,
struct c8sectpfei *fei);
#endif

1158
drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-core.c
View File

File diff suppressed because it is too large Load Diff

287
drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-core.h
View File

@@ -1,287 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* c8sectpfe-core.h - C8SECTPFE STi DVB driver
*
* Copyright (c) STMicroelectronics 2015
*
* Author:Peter Bennett <peter.bennett@st.com>
* Peter Griffin <peter.griffin@linaro.org>
*
*/
#ifndef _C8SECTPFE_CORE_H_
#define _C8SECTPFE_CORE_H_
#define C8SECTPFEI_MAXCHANNEL 16
#define C8SECTPFEI_MAXADAPTER 3
#define C8SECTPFE_MAX_TSIN_CHAN 8
struct gpio_desc;
struct channel_info {
int tsin_id;
bool invert_ts_clk;
bool serial_not_parallel;
bool async_not_sync;
int i2c;
int dvb_card;
struct gpio_desc *rst_gpio;
struct i2c_adapter *i2c_adapter;
struct i2c_adapter *tuner_i2c;
struct i2c_adapter *lnb_i2c;
struct i2c_client *i2c_client;
struct dvb_frontend *frontend;
struct pinctrl_state *pstate;
int demux_mapping;
int active;
void *back_buffer_start;
void *back_buffer_aligned;
dma_addr_t back_buffer_busaddr;
void *pid_buffer_start;
void *pid_buffer_aligned;
dma_addr_t pid_buffer_busaddr;
unsigned long fifo;
struct completion idle_completion;
struct work_struct bh_work;
struct c8sectpfei *fei;
void __iomem *irec;
};
struct c8sectpfe_hw {
int num_ib;
int num_mib;
int num_swts;
int num_tsout;
int num_ccsc;
int num_ram;
int num_tp;
};
struct c8sectpfei {
struct device *dev;
struct pinctrl *pinctrl;
struct dentry *root;
struct debugfs_regset32 *regset;
struct completion fw_ack;
atomic_t fw_loaded;
int tsin_count;
struct c8sectpfe_hw hw_stats;
struct c8sectpfe *c8sectpfe[C8SECTPFEI_MAXADAPTER];
int mapping[C8SECTPFEI_MAXCHANNEL];
struct mutex lock;
struct timer_list timer; /* timer interrupts for outputs */
void __iomem *io;
void __iomem *sram;
unsigned long sram_size;
struct channel_info *channel_data[C8SECTPFE_MAX_TSIN_CHAN];
struct clk *c8sectpfeclk;
int nima_rst_gpio;
int nimb_rst_gpio;
int idle_irq;
int error_irq;
int global_feed_count;
};
/* C8SECTPFE SYS Regs list */
#define SYS_INPUT_ERR_STATUS 0x0
#define SYS_OTHER_ERR_STATUS 0x8
#define SYS_INPUT_ERR_MASK 0x10
#define SYS_OTHER_ERR_MASK 0x18
#define SYS_DMA_ROUTE 0x20
#define SYS_INPUT_CLKEN 0x30
#define IBENABLE_MASK 0x7F
#define SYS_OTHER_CLKEN 0x38
#define TSDMAENABLE BIT(1)
#define MEMDMAENABLE BIT(0)
#define SYS_CFG_NUM_IB 0x200
#define SYS_CFG_NUM_MIB 0x204
#define SYS_CFG_NUM_SWTS 0x208
#define SYS_CFG_NUM_TSOUT 0x20C
#define SYS_CFG_NUM_CCSC 0x210
#define SYS_CFG_NUM_RAM 0x214
#define SYS_CFG_NUM_TP 0x218
/* Input Block Regs */
#define C8SECTPFE_INPUTBLK_OFFSET 0x1000
#define C8SECTPFE_CHANNEL_OFFSET(x) ((x*0x40) + C8SECTPFE_INPUTBLK_OFFSET)
#define C8SECTPFE_IB_IP_FMT_CFG(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x00)
#define C8SECTPFE_IGNORE_ERR_AT_SOP BIT(7)
#define C8SECTPFE_IGNORE_ERR_IN_PKT BIT(6)
#define C8SECTPFE_IGNORE_ERR_IN_BYTE BIT(5)
#define C8SECTPFE_INVERT_TSCLK BIT(4)
#define C8SECTPFE_ALIGN_BYTE_SOP BIT(3)
#define C8SECTPFE_ASYNC_NOT_SYNC BIT(2)
#define C8SECTPFE_BYTE_ENDIANNESS_MSB BIT(1)
#define C8SECTPFE_SERIAL_NOT_PARALLEL BIT(0)
#define C8SECTPFE_IB_SYNCLCKDRP_CFG(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x04)
#define C8SECTPFE_SYNC(x) (x & 0xf)
#define C8SECTPFE_DROP(x) ((x<<4) & 0xf)
#define C8SECTPFE_TOKEN(x) ((x<<8) & 0xff00)
#define C8SECTPFE_SLDENDIANNESS BIT(16)
#define C8SECTPFE_IB_TAGBYTES_CFG(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x08)
#define C8SECTPFE_TAG_HEADER(x) (x << 16)
#define C8SECTPFE_TAG_COUNTER(x) ((x<<1) & 0x7fff)
#define C8SECTPFE_TAG_ENABLE BIT(0)
#define C8SECTPFE_IB_PID_SET(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x0C)
#define C8SECTPFE_PID_OFFSET(x) (x & 0x3f)
#define C8SECTPFE_PID_NUMBITS(x) ((x << 6) & 0xfff)
#define C8SECTPFE_PID_ENABLE BIT(31)
#define C8SECTPFE_IB_PKT_LEN(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x10)
#define C8SECTPFE_IB_BUFF_STRT(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x14)
#define C8SECTPFE_IB_BUFF_END(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x18)
#define C8SECTPFE_IB_READ_PNT(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x1C)
#define C8SECTPFE_IB_WRT_PNT(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x20)
#define C8SECTPFE_IB_PRI_THRLD(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x24)
#define C8SECTPFE_PRI_VALUE(x) (x & 0x7fffff)
#define C8SECTPFE_PRI_LOWPRI(x) ((x & 0xf) << 24)
#define C8SECTPFE_PRI_HIGHPRI(x) ((x & 0xf) << 28)
#define C8SECTPFE_IB_STAT(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x28)
#define C8SECTPFE_STAT_FIFO_OVERFLOW(x) (x & 0x1)
#define C8SECTPFE_STAT_BUFFER_OVERFLOW(x) (x & 0x2)
#define C8SECTPFE_STAT_OUTOFORDERRP(x) (x & 0x4)
#define C8SECTPFE_STAT_PID_OVERFLOW(x) (x & 0x8)
#define C8SECTPFE_STAT_PKT_OVERFLOW(x) (x & 0x10)
#define C8SECTPFE_STAT_ERROR_PACKETS(x) ((x >> 8) & 0xf)
#define C8SECTPFE_STAT_SHORT_PACKETS(x) ((x >> 12) & 0xf)
#define C8SECTPFE_IB_MASK(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x2C)
#define C8SECTPFE_MASK_FIFO_OVERFLOW BIT(0)
#define C8SECTPFE_MASK_BUFFER_OVERFLOW BIT(1)
#define C8SECTPFE_MASK_OUTOFORDERRP(x) BIT(2)
#define C8SECTPFE_MASK_PID_OVERFLOW(x) BIT(3)
#define C8SECTPFE_MASK_PKT_OVERFLOW(x) BIT(4)
#define C8SECTPFE_MASK_ERROR_PACKETS(x) ((x & 0xf) << 8)
#define C8SECTPFE_MASK_SHORT_PACKETS(x) ((x & 0xf) >> 12)
#define C8SECTPFE_IB_SYS(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x30)
#define C8SECTPFE_SYS_RESET BIT(1)
#define C8SECTPFE_SYS_ENABLE BIT(0)
/*
* Pointer record data structure required for each input block
* see Table 82 on page 167 of functional specification.
*/
#define DMA_PRDS_MEMBASE 0x0 /* Internal sram base address */
#define DMA_PRDS_MEMTOP 0x4 /* Internal sram top address */
/*
* TS packet size, including tag bytes added by input block,
* rounded up to the next multiple of 8 bytes. The packet size,
* including any tagging bytes and rounded up to the nearest
* multiple of 8 bytes must be less than 255 bytes.
*/
#define DMA_PRDS_PKTSIZE 0x8
#define DMA_PRDS_TPENABLE 0xc
#define TP0_OFFSET 0x10
#define DMA_PRDS_BUSBASE_TP(x) ((0x10*x) + TP0_OFFSET)
#define DMA_PRDS_BUSTOP_TP(x) ((0x10*x) + TP0_OFFSET + 0x4)
#define DMA_PRDS_BUSWP_TP(x) ((0x10*x) + TP0_OFFSET + 0x8)
#define DMA_PRDS_BUSRP_TP(x) ((0x10*x) + TP0_OFFSET + 0xc)
#define DMA_PRDS_SIZE (0x20)
#define DMA_MEMDMA_OFFSET 0x4000
#define DMA_IMEM_OFFSET 0x0
#define DMA_DMEM_OFFSET 0x4000
#define DMA_CPU 0x8000
#define DMA_PER_OFFSET 0xb000
#define DMA_MEMDMA_DMEM (DMA_MEMDMA_OFFSET + DMA_DMEM_OFFSET)
#define DMA_MEMDMA_IMEM (DMA_MEMDMA_OFFSET + DMA_IMEM_OFFSET)
/* XP70 Slim core regs */
#define DMA_CPU_ID (DMA_MEMDMA_OFFSET + DMA_CPU + 0x0)
#define DMA_CPU_VCR (DMA_MEMDMA_OFFSET + DMA_CPU + 0x4)
#define DMA_CPU_RUN (DMA_MEMDMA_OFFSET + DMA_CPU + 0x8)
#define DMA_CPU_CLOCKGATE (DMA_MEMDMA_OFFSET + DMA_CPU + 0xc)
#define DMA_CPU_PC (DMA_MEMDMA_OFFSET + DMA_CPU + 0x20)
/* Enable Interrupt for a IB */
#define DMA_PER_TPn_DREQ_MASK (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xd00)
/* Ack interrupt by setting corresponding bit */
#define DMA_PER_TPn_DACK_SET (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xd80)
#define DMA_PER_TPn_DREQ (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xe00)
#define DMA_PER_TPn_DACK (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xe80)
#define DMA_PER_DREQ_MODE (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xf80)
#define DMA_PER_STBUS_SYNC (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xf88)
#define DMA_PER_STBUS_ACCESS (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xf8c)
#define DMA_PER_STBUS_ADDRESS (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xf90)
#define DMA_PER_IDLE_INT (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xfa8)
#define DMA_PER_PRIORITY (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xfac)
#define DMA_PER_MAX_OPCODE (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xfb0)
#define DMA_PER_MAX_CHUNK (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xfb4)
#define DMA_PER_PAGE_SIZE (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xfbc)
#define DMA_PER_MBOX_STATUS (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xfc0)
#define DMA_PER_MBOX_SET (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xfc8)
#define DMA_PER_MBOX_CLEAR (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xfd0)
#define DMA_PER_MBOX_MASK (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xfd8)
#define DMA_PER_INJECT_PKT_SRC (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xfe0)
#define DMA_PER_INJECT_PKT_DEST (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xfe4)
#define DMA_PER_INJECT_PKT_ADDR (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xfe8)
#define DMA_PER_INJECT_PKT (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xfec)
#define DMA_PER_PAT_PTR_INIT (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xff0)
#define DMA_PER_PAT_PTR (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xff4)
#define DMA_PER_SLEEP_MASK (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xff8)
#define DMA_PER_SLEEP_COUNTER (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xffc)
/* #define DMA_RF_CPUREGn DMA_RFBASEADDR n=0 to 15) slim regsa */
/* The following are from DMA_DMEM_BaseAddress */
#define DMA_FIRMWARE_VERSION (DMA_MEMDMA_OFFSET + DMA_DMEM_OFFSET + 0x0)
#define DMA_PTRREC_BASE (DMA_MEMDMA_OFFSET + DMA_DMEM_OFFSET + 0x4)
#define DMA_PTRREC_INPUT_OFFSET (DMA_MEMDMA_OFFSET + DMA_DMEM_OFFSET + 0x8)
#define DMA_ERRREC_BASE (DMA_MEMDMA_OFFSET + DMA_DMEM_OFFSET + 0xc)
#define DMA_ERROR_RECORD(n) ((n*4) + DMA_ERRREC_BASE + 0x4)
#define DMA_IDLE_REQ (DMA_MEMDMA_OFFSET + DMA_DMEM_OFFSET + 0x10)
#define IDLEREQ BIT(31)
#define DMA_FIRMWARE_CONFIG (DMA_MEMDMA_OFFSET + DMA_DMEM_OFFSET + 0x14)
/* Regs for PID Filter */
#define PIDF_OFFSET 0x2800
#define PIDF_BASE(n) ((n*4) + PIDF_OFFSET)
#define PIDF_LEAK_ENABLE (PIDF_OFFSET + 0x100)
#define PIDF_LEAK_STATUS (PIDF_OFFSET + 0x108)
#define PIDF_LEAK_COUNT_RESET (PIDF_OFFSET + 0x110)
#define PIDF_LEAK_COUNTER (PIDF_OFFSET + 0x114)
#endif /* _C8SECTPFE_CORE_H_ */

244
drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-debugfs.c
View File

@@ -1,244 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/*
* c8sectpfe-debugfs.c - C8SECTPFE STi DVB driver
*
* Copyright (c) STMicroelectronics 2015
*
* Author: Peter Griffin <peter.griffin@linaro.org>
*
*/
#include <linux/debugfs.h>
#include <linux/device.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/seq_file.h>
#include <linux/slab.h>
#include <linux/types.h>
#include "c8sectpfe-debugfs.h"
#define dump_register(nm ...) \
{ \
.name = #nm, \
.offset = nm, \
}
static const struct debugfs_reg32 fei_sys_regs[] = {
dump_register(SYS_INPUT_ERR_STATUS),
dump_register(SYS_OTHER_ERR_STATUS),
dump_register(SYS_INPUT_ERR_MASK),
dump_register(SYS_DMA_ROUTE),
dump_register(SYS_INPUT_CLKEN),
dump_register(IBENABLE_MASK),
dump_register(SYS_OTHER_CLKEN),
dump_register(SYS_CFG_NUM_IB),
dump_register(SYS_CFG_NUM_MIB),
dump_register(SYS_CFG_NUM_SWTS),
dump_register(SYS_CFG_NUM_TSOUT),
dump_register(SYS_CFG_NUM_CCSC),
dump_register(SYS_CFG_NUM_RAM),
dump_register(SYS_CFG_NUM_TP),
dump_register(C8SECTPFE_IB_IP_FMT_CFG(0)),
dump_register(C8SECTPFE_IB_TAGBYTES_CFG(0)),
dump_register(C8SECTPFE_IB_PID_SET(0)),
dump_register(C8SECTPFE_IB_PKT_LEN(0)),
dump_register(C8SECTPFE_IB_BUFF_STRT(0)),
dump_register(C8SECTPFE_IB_BUFF_END(0)),
dump_register(C8SECTPFE_IB_READ_PNT(0)),
dump_register(C8SECTPFE_IB_WRT_PNT(0)),
dump_register(C8SECTPFE_IB_PRI_THRLD(0)),
dump_register(C8SECTPFE_IB_STAT(0)),
dump_register(C8SECTPFE_IB_MASK(0)),
dump_register(C8SECTPFE_IB_SYS(0)),
dump_register(C8SECTPFE_IB_IP_FMT_CFG(1)),
dump_register(C8SECTPFE_IB_TAGBYTES_CFG(1)),
dump_register(C8SECTPFE_IB_PID_SET(1)),
dump_register(C8SECTPFE_IB_PKT_LEN(1)),
dump_register(C8SECTPFE_IB_BUFF_STRT(1)),
dump_register(C8SECTPFE_IB_BUFF_END(1)),
dump_register(C8SECTPFE_IB_READ_PNT(1)),
dump_register(C8SECTPFE_IB_WRT_PNT(1)),
dump_register(C8SECTPFE_IB_PRI_THRLD(1)),
dump_register(C8SECTPFE_IB_STAT(1)),
dump_register(C8SECTPFE_IB_MASK(1)),
dump_register(C8SECTPFE_IB_SYS(1)),
dump_register(C8SECTPFE_IB_IP_FMT_CFG(2)),
dump_register(C8SECTPFE_IB_TAGBYTES_CFG(2)),
dump_register(C8SECTPFE_IB_PID_SET(2)),
dump_register(C8SECTPFE_IB_PKT_LEN(2)),
dump_register(C8SECTPFE_IB_BUFF_STRT(2)),
dump_register(C8SECTPFE_IB_BUFF_END(2)),
dump_register(C8SECTPFE_IB_READ_PNT(2)),
dump_register(C8SECTPFE_IB_WRT_PNT(2)),
dump_register(C8SECTPFE_IB_PRI_THRLD(2)),
dump_register(C8SECTPFE_IB_STAT(2)),
dump_register(C8SECTPFE_IB_MASK(2)),
dump_register(C8SECTPFE_IB_SYS(2)),
dump_register(C8SECTPFE_IB_IP_FMT_CFG(3)),
dump_register(C8SECTPFE_IB_TAGBYTES_CFG(3)),
dump_register(C8SECTPFE_IB_PID_SET(3)),
dump_register(C8SECTPFE_IB_PKT_LEN(3)),
dump_register(C8SECTPFE_IB_BUFF_STRT(3)),
dump_register(C8SECTPFE_IB_BUFF_END(3)),
dump_register(C8SECTPFE_IB_READ_PNT(3)),
dump_register(C8SECTPFE_IB_WRT_PNT(3)),
dump_register(C8SECTPFE_IB_PRI_THRLD(3)),
dump_register(C8SECTPFE_IB_STAT(3)),
dump_register(C8SECTPFE_IB_MASK(3)),
dump_register(C8SECTPFE_IB_SYS(3)),
dump_register(C8SECTPFE_IB_IP_FMT_CFG(4)),
dump_register(C8SECTPFE_IB_TAGBYTES_CFG(4)),
dump_register(C8SECTPFE_IB_PID_SET(4)),
dump_register(C8SECTPFE_IB_PKT_LEN(4)),
dump_register(C8SECTPFE_IB_BUFF_STRT(4)),
dump_register(C8SECTPFE_IB_BUFF_END(4)),
dump_register(C8SECTPFE_IB_READ_PNT(4)),
dump_register(C8SECTPFE_IB_WRT_PNT(4)),
dump_register(C8SECTPFE_IB_PRI_THRLD(4)),
dump_register(C8SECTPFE_IB_STAT(4)),
dump_register(C8SECTPFE_IB_MASK(4)),
dump_register(C8SECTPFE_IB_SYS(4)),
dump_register(C8SECTPFE_IB_IP_FMT_CFG(5)),
dump_register(C8SECTPFE_IB_TAGBYTES_CFG(5)),
dump_register(C8SECTPFE_IB_PID_SET(5)),
dump_register(C8SECTPFE_IB_PKT_LEN(5)),
dump_register(C8SECTPFE_IB_BUFF_STRT(5)),
dump_register(C8SECTPFE_IB_BUFF_END(5)),
dump_register(C8SECTPFE_IB_READ_PNT(5)),
dump_register(C8SECTPFE_IB_WRT_PNT(5)),
dump_register(C8SECTPFE_IB_PRI_THRLD(5)),
dump_register(C8SECTPFE_IB_STAT(5)),
dump_register(C8SECTPFE_IB_MASK(5)),
dump_register(C8SECTPFE_IB_SYS(5)),
dump_register(C8SECTPFE_IB_IP_FMT_CFG(6)),
dump_register(C8SECTPFE_IB_TAGBYTES_CFG(6)),
dump_register(C8SECTPFE_IB_PID_SET(6)),
dump_register(C8SECTPFE_IB_PKT_LEN(6)),
dump_register(C8SECTPFE_IB_BUFF_STRT(6)),
dump_register(C8SECTPFE_IB_BUFF_END(6)),
dump_register(C8SECTPFE_IB_READ_PNT(6)),
dump_register(C8SECTPFE_IB_WRT_PNT(6)),
dump_register(C8SECTPFE_IB_PRI_THRLD(6)),
dump_register(C8SECTPFE_IB_STAT(6)),
dump_register(C8SECTPFE_IB_MASK(6)),
dump_register(C8SECTPFE_IB_SYS(6)),
dump_register(DMA_CPU_ID),
dump_register(DMA_CPU_VCR),
dump_register(DMA_CPU_RUN),
dump_register(DMA_CPU_PC),
dump_register(DMA_PER_TPn_DREQ_MASK),
dump_register(DMA_PER_TPn_DACK_SET),
dump_register(DMA_PER_TPn_DREQ),
dump_register(DMA_PER_TPn_DACK),
dump_register(DMA_PER_DREQ_MODE),
dump_register(DMA_PER_STBUS_SYNC),
dump_register(DMA_PER_STBUS_ACCESS),
dump_register(DMA_PER_STBUS_ADDRESS),
dump_register(DMA_PER_IDLE_INT),
dump_register(DMA_PER_PRIORITY),
dump_register(DMA_PER_MAX_OPCODE),
dump_register(DMA_PER_MAX_CHUNK),
dump_register(DMA_PER_PAGE_SIZE),
dump_register(DMA_PER_MBOX_STATUS),
dump_register(DMA_PER_MBOX_SET),
dump_register(DMA_PER_MBOX_CLEAR),
dump_register(DMA_PER_MBOX_MASK),
dump_register(DMA_PER_INJECT_PKT_SRC),
dump_register(DMA_PER_INJECT_PKT_DEST),
dump_register(DMA_PER_INJECT_PKT_ADDR),
dump_register(DMA_PER_INJECT_PKT),
dump_register(DMA_PER_PAT_PTR_INIT),
dump_register(DMA_PER_PAT_PTR),
dump_register(DMA_PER_SLEEP_MASK),
dump_register(DMA_PER_SLEEP_COUNTER),
dump_register(DMA_FIRMWARE_VERSION),
dump_register(DMA_PTRREC_BASE),
dump_register(DMA_PTRREC_INPUT_OFFSET),
dump_register(DMA_ERRREC_BASE),
dump_register(DMA_ERROR_RECORD(0)),
dump_register(DMA_ERROR_RECORD(1)),
dump_register(DMA_ERROR_RECORD(2)),
dump_register(DMA_ERROR_RECORD(3)),
dump_register(DMA_ERROR_RECORD(4)),
dump_register(DMA_ERROR_RECORD(5)),
dump_register(DMA_ERROR_RECORD(6)),
dump_register(DMA_ERROR_RECORD(7)),
dump_register(DMA_ERROR_RECORD(8)),
dump_register(DMA_ERROR_RECORD(9)),
dump_register(DMA_ERROR_RECORD(10)),
dump_register(DMA_ERROR_RECORD(11)),
dump_register(DMA_ERROR_RECORD(12)),
dump_register(DMA_ERROR_RECORD(13)),
dump_register(DMA_ERROR_RECORD(14)),
dump_register(DMA_ERROR_RECORD(15)),
dump_register(DMA_ERROR_RECORD(16)),
dump_register(DMA_ERROR_RECORD(17)),
dump_register(DMA_ERROR_RECORD(18)),
dump_register(DMA_ERROR_RECORD(19)),
dump_register(DMA_ERROR_RECORD(20)),
dump_register(DMA_ERROR_RECORD(21)),
dump_register(DMA_ERROR_RECORD(22)),
dump_register(DMA_IDLE_REQ),
dump_register(DMA_FIRMWARE_CONFIG),
dump_register(PIDF_BASE(0)),
dump_register(PIDF_BASE(1)),
dump_register(PIDF_BASE(2)),
dump_register(PIDF_BASE(3)),
dump_register(PIDF_BASE(4)),
dump_register(PIDF_BASE(5)),
dump_register(PIDF_BASE(6)),
dump_register(PIDF_BASE(7)),
dump_register(PIDF_BASE(8)),
dump_register(PIDF_BASE(9)),
dump_register(PIDF_BASE(10)),
dump_register(PIDF_BASE(11)),
dump_register(PIDF_BASE(12)),
dump_register(PIDF_BASE(13)),
dump_register(PIDF_BASE(14)),
dump_register(PIDF_BASE(15)),
dump_register(PIDF_BASE(16)),
dump_register(PIDF_BASE(17)),
dump_register(PIDF_BASE(18)),
dump_register(PIDF_BASE(19)),
dump_register(PIDF_BASE(20)),
dump_register(PIDF_BASE(21)),
dump_register(PIDF_BASE(22)),
dump_register(PIDF_LEAK_ENABLE),
dump_register(PIDF_LEAK_STATUS),
dump_register(PIDF_LEAK_COUNT_RESET),
dump_register(PIDF_LEAK_COUNTER),
};
void c8sectpfe_debugfs_init(struct c8sectpfei *fei)
{
fei->regset = devm_kzalloc(fei->dev, sizeof(*fei->regset), GFP_KERNEL);
if (!fei->regset)
return;
fei->regset->regs = fei_sys_regs;
fei->regset->nregs = ARRAY_SIZE(fei_sys_regs);
fei->regset->base = fei->io;
fei->root = debugfs_create_dir("c8sectpfe", NULL);
debugfs_create_regset32("registers", S_IRUGO, fei->root, fei->regset);
}
void c8sectpfe_debugfs_exit(struct c8sectpfei *fei)
{
debugfs_remove_recursive(fei->root);
fei->root = NULL;
}

23
drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-debugfs.h
View File

@@ -1,23 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* c8sectpfe-debugfs.h - C8SECTPFE STi DVB driver debugfs header
*
* Copyright (c) STMicroelectronics 2015
*
* Authors: Peter Griffin <peter.griffin@linaro.org>
*/
#ifndef __C8SECTPFE_DEBUG_H
#define __C8SECTPFE_DEBUG_H
#include "c8sectpfe-core.h"
#if defined(CONFIG_DEBUG_FS)
void c8sectpfe_debugfs_init(struct c8sectpfei *);
void c8sectpfe_debugfs_exit(struct c8sectpfei *);
#else
static inline void c8sectpfe_debugfs_init(struct c8sectpfei *fei) {};
static inline void c8sectpfe_debugfs_exit(struct c8sectpfei *fei) {};
#endif
#endif /* __C8SECTPFE_DEBUG_H */

235
drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-dvb.c
View File

@@ -1,235 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/*
* c8sectpfe-dvb.c - C8SECTPFE STi DVB driver
*
* Copyright (c) STMicroelectronics 2015
*
* Author Peter Griffin <peter.griffin@linaro.org>
*
*/
#include <linux/completion.h>
#include <linux/delay.h>
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <dt-bindings/media/c8sectpfe.h>
#include "c8sectpfe-common.h"
#include "c8sectpfe-core.h"
#include "c8sectpfe-dvb.h"
#include "dvb-pll.h"
#include "lnbh24.h"
#include "stv0367.h"
#include "stv0367_priv.h"
#include "stv6110x.h"
#include "stv090x.h"
#include "tda18212.h"
static inline const char *dvb_card_str(unsigned int c)
{
switch (c) {
case STV0367_TDA18212_NIMA_1: return "STV0367_TDA18212_NIMA_1";
case STV0367_TDA18212_NIMA_2: return "STV0367_TDA18212_NIMA_2";
case STV0367_TDA18212_NIMB_1: return "STV0367_TDA18212_NIMB_1";
case STV0367_TDA18212_NIMB_2: return "STV0367_TDA18212_NIMB_2";
case STV0903_6110_LNB24_NIMA: return "STV0903_6110_LNB24_NIMA";
case STV0903_6110_LNB24_NIMB: return "STV0903_6110_LNB24_NIMB";
default: return "unknown dvb frontend card";
}
}
static struct stv090x_config stv090x_config = {
.device = STV0903,
.demod_mode = STV090x_SINGLE,
.clk_mode = STV090x_CLK_EXT,
.xtal = 16000000,
.address = 0x69,
.ts1_mode = STV090x_TSMODE_SERIAL_CONTINUOUS,
.ts2_mode = STV090x_TSMODE_SERIAL_CONTINUOUS,
.repeater_level = STV090x_RPTLEVEL_64,
.tuner_init = NULL,
.tuner_set_mode = NULL,
.tuner_set_frequency = NULL,
.tuner_get_frequency = NULL,
.tuner_set_bandwidth = NULL,
.tuner_get_bandwidth = NULL,
.tuner_set_bbgain = NULL,
.tuner_get_bbgain = NULL,
.tuner_set_refclk = NULL,
.tuner_get_status = NULL,
};
static struct stv6110x_config stv6110x_config = {
.addr = 0x60,
.refclk = 16000000,
};
#define NIMA 0
#define NIMB 1
static struct stv0367_config stv0367_tda18212_config[] = {
{
.demod_address = 0x1c,
.xtal = 16000000,
.if_khz = 4500,
.if_iq_mode = FE_TER_NORMAL_IF_TUNER,
.ts_mode = STV0367_SERIAL_PUNCT_CLOCK,
.clk_pol = STV0367_CLOCKPOLARITY_DEFAULT,
}, {
.demod_address = 0x1d,
.xtal = 16000000,
.if_khz = 4500,
.if_iq_mode = FE_TER_NORMAL_IF_TUNER,
.ts_mode = STV0367_SERIAL_PUNCT_CLOCK,
.clk_pol = STV0367_CLOCKPOLARITY_DEFAULT,
}, {
.demod_address = 0x1e,
.xtal = 16000000,
.if_khz = 4500,
.if_iq_mode = FE_TER_NORMAL_IF_TUNER,
.ts_mode = STV0367_SERIAL_PUNCT_CLOCK,
.clk_pol = STV0367_CLOCKPOLARITY_DEFAULT,
},
};
static struct tda18212_config tda18212_conf = {
.if_dvbt_6 = 4150,
.if_dvbt_7 = 4150,
.if_dvbt_8 = 4500,
.if_dvbc = 5000,
};
int c8sectpfe_frontend_attach(struct dvb_frontend **fe,
struct c8sectpfe *c8sectpfe,
struct channel_info *tsin, int chan_num)
{
struct tda18212_config *tda18212;
const struct stv6110x_devctl *fe2;
struct i2c_client *client;
struct i2c_board_info tda18212_info = {
.type = "tda18212",
.addr = 0x60,
};
if (!tsin)
return -EINVAL;
switch (tsin->dvb_card) {
case STV0367_TDA18212_NIMA_1:
case STV0367_TDA18212_NIMA_2:
case STV0367_TDA18212_NIMB_1:
case STV0367_TDA18212_NIMB_2:
if (tsin->dvb_card == STV0367_TDA18212_NIMA_1)
*fe = dvb_attach(stv0367ter_attach,
&stv0367_tda18212_config[0],
tsin->i2c_adapter);
else if (tsin->dvb_card == STV0367_TDA18212_NIMB_1)
*fe = dvb_attach(stv0367ter_attach,
&stv0367_tda18212_config[1],
tsin->i2c_adapter);
else
*fe = dvb_attach(stv0367ter_attach,
&stv0367_tda18212_config[2],
tsin->i2c_adapter);
if (!*fe) {
dev_err(c8sectpfe->device,
"%s: stv0367ter_attach failed for NIM card %s\n"
, __func__, dvb_card_str(tsin->dvb_card));
return -ENODEV;
}
/*
* init the demod so that i2c gate_ctrl
* to the tuner works correctly
*/
(*fe)->ops.init(*fe);
/* Allocate the tda18212 structure */
tda18212 = devm_kzalloc(c8sectpfe->device,
sizeof(struct tda18212_config),
GFP_KERNEL);
if (!tda18212) {
dev_err(c8sectpfe->device,
"%s: devm_kzalloc failed\n", __func__);
return -ENOMEM;
}
memcpy(tda18212, &tda18212_conf,
sizeof(struct tda18212_config));
tda18212->fe = (*fe);
tda18212_info.platform_data = tda18212;
/* attach tuner */
request_module("tda18212");
client = i2c_new_client_device(tsin->i2c_adapter,
&tda18212_info);
if (!i2c_client_has_driver(client)) {
dvb_frontend_detach(*fe);
return -ENODEV;
}
if (!try_module_get(client->dev.driver->owner)) {
i2c_unregister_device(client);
dvb_frontend_detach(*fe);
return -ENODEV;
}
tsin->i2c_client = client;
break;
case STV0903_6110_LNB24_NIMA:
*fe = dvb_attach(stv090x_attach, &stv090x_config,
tsin->i2c_adapter, STV090x_DEMODULATOR_0);
if (!*fe) {
dev_err(c8sectpfe->device, "%s: stv090x_attach failed\n"
"\tfor NIM card %s\n",
__func__, dvb_card_str(tsin->dvb_card));
return -ENODEV;
}
fe2 = dvb_attach(stv6110x_attach, *fe,
&stv6110x_config, tsin->i2c_adapter);
if (!fe2) {
dev_err(c8sectpfe->device,
"%s: stv6110x_attach failed for NIM card %s\n"
, __func__, dvb_card_str(tsin->dvb_card));
return -ENODEV;
}
stv090x_config.tuner_init = fe2->tuner_init;
stv090x_config.tuner_set_mode = fe2->tuner_set_mode;
stv090x_config.tuner_set_frequency = fe2->tuner_set_frequency;
stv090x_config.tuner_get_frequency = fe2->tuner_get_frequency;
stv090x_config.tuner_set_bandwidth = fe2->tuner_set_bandwidth;
stv090x_config.tuner_get_bandwidth = fe2->tuner_get_bandwidth;
stv090x_config.tuner_set_bbgain = fe2->tuner_set_bbgain;
stv090x_config.tuner_get_bbgain = fe2->tuner_get_bbgain;
stv090x_config.tuner_set_refclk = fe2->tuner_set_refclk;
stv090x_config.tuner_get_status = fe2->tuner_get_status;
dvb_attach(lnbh24_attach, *fe, tsin->i2c_adapter, 0, 0, 0x9);
break;
default:
dev_err(c8sectpfe->device,
"%s: DVB frontend card %s not yet supported\n",
__func__, dvb_card_str(tsin->dvb_card));
return -ENODEV;
}
(*fe)->id = chan_num;
dev_info(c8sectpfe->device,
"DVB frontend card %s successfully attached",
dvb_card_str(tsin->dvb_card));
return 0;
}

17
drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-dvb.h
View File

@@ -1,17 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* c8sectpfe-common.h - C8SECTPFE STi DVB driver
*
* Copyright (c) STMicroelectronics 2015
*
* Author: Peter Griffin <peter.griffin@linaro.org>
*
*/
#ifndef _C8SECTPFE_DVB_H_
#define _C8SECTPFE_DVB_H_
int c8sectpfe_frontend_attach(struct dvb_frontend **fe,
struct c8sectpfe *c8sectpfe, struct channel_info *tsin,
int chan_num);
#endif