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iio: adis16480: make the burst_max_speed configurable
With this, we can pass the maxixum spi burst speed to the 'ADIS16480_DATA()' macro. This is in preparation to support new devices that have a different speed than the one used so far. Co-developed-by: Nuno Sá <nuno.sa@analog.com> Signed-off-by: Ramona Gradinariu <ramona.gradinariu@analog.com> Reviewed-by: Nuno Sa <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20240528142409.239187-2-ramona.gradinariu@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This commit is contained in:
Ramona Gradinariu
committed by
Jonathan Cameron
Jonathan Cameron
parent
f95920baa0
commit
8c0a438fa0
@@ -107,8 +107,6 @@
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#define ADIS16495_BURST_ID 0xA5A5
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/* total number of segments in burst */
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#define ADIS16495_BURST_MAX_DATA 20
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/* spi max speed in burst mode */
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#define ADIS16495_BURST_MAX_SPEED 6000000
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#define ADIS16480_REG_SERIAL_NUM ADIS16480_REG(0x04, 0x20)
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@@ -872,33 +870,33 @@ static const char * const adis16480_status_error_msgs[] = {
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static int adis16480_enable_irq(struct adis *adis, bool enable);
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#define ADIS16480_DATA(_prod_id, _timeouts, _burst_len) \
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{ \
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.diag_stat_reg = ADIS16480_REG_DIAG_STS, \
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.glob_cmd_reg = ADIS16480_REG_GLOB_CMD, \
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.prod_id_reg = ADIS16480_REG_PROD_ID, \
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.prod_id = (_prod_id), \
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.has_paging = true, \
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.read_delay = 5, \
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.write_delay = 5, \
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.self_test_mask = BIT(1), \
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.self_test_reg = ADIS16480_REG_GLOB_CMD, \
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.status_error_msgs = adis16480_status_error_msgs, \
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.status_error_mask = BIT(ADIS16480_DIAG_STAT_XGYRO_FAIL) | \
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BIT(ADIS16480_DIAG_STAT_YGYRO_FAIL) | \
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BIT(ADIS16480_DIAG_STAT_ZGYRO_FAIL) | \
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BIT(ADIS16480_DIAG_STAT_XACCL_FAIL) | \
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BIT(ADIS16480_DIAG_STAT_YACCL_FAIL) | \
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BIT(ADIS16480_DIAG_STAT_ZACCL_FAIL) | \
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BIT(ADIS16480_DIAG_STAT_XMAGN_FAIL) | \
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BIT(ADIS16480_DIAG_STAT_YMAGN_FAIL) | \
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BIT(ADIS16480_DIAG_STAT_ZMAGN_FAIL) | \
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BIT(ADIS16480_DIAG_STAT_BARO_FAIL), \
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.enable_irq = adis16480_enable_irq, \
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.timeouts = (_timeouts), \
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.burst_reg_cmd = ADIS16495_REG_BURST_CMD, \
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.burst_len = (_burst_len), \
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.burst_max_speed_hz = ADIS16495_BURST_MAX_SPEED \
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#define ADIS16480_DATA(_prod_id, _timeouts, _burst_len, _burst_max_speed) \
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{ \
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.diag_stat_reg = ADIS16480_REG_DIAG_STS, \
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.glob_cmd_reg = ADIS16480_REG_GLOB_CMD, \
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.prod_id_reg = ADIS16480_REG_PROD_ID, \
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.prod_id = (_prod_id), \
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.has_paging = true, \
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.read_delay = 5, \
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.write_delay = 5, \
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.self_test_mask = BIT(1), \
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.self_test_reg = ADIS16480_REG_GLOB_CMD, \
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.status_error_msgs = adis16480_status_error_msgs, \
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.status_error_mask = BIT(ADIS16480_DIAG_STAT_XGYRO_FAIL) | \
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BIT(ADIS16480_DIAG_STAT_YGYRO_FAIL) | \
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BIT(ADIS16480_DIAG_STAT_ZGYRO_FAIL) | \
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BIT(ADIS16480_DIAG_STAT_XACCL_FAIL) | \
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BIT(ADIS16480_DIAG_STAT_YACCL_FAIL) | \
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BIT(ADIS16480_DIAG_STAT_ZACCL_FAIL) | \
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BIT(ADIS16480_DIAG_STAT_XMAGN_FAIL) | \
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BIT(ADIS16480_DIAG_STAT_YMAGN_FAIL) | \
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BIT(ADIS16480_DIAG_STAT_ZMAGN_FAIL) | \
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BIT(ADIS16480_DIAG_STAT_BARO_FAIL), \
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.enable_irq = adis16480_enable_irq, \
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.timeouts = (_timeouts), \
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.burst_reg_cmd = ADIS16495_REG_BURST_CMD, \
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.burst_len = (_burst_len), \
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.burst_max_speed_hz = _burst_max_speed \
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}
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static const struct adis_timeout adis16485_timeouts = {
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@@ -944,7 +942,7 @@ static const struct adis16480_chip_info adis16480_chip_info[] = {
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.max_dec_rate = 2048,
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.has_sleep_cnt = true,
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.filter_freqs = adis16480_def_filter_freqs,
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.adis_data = ADIS16480_DATA(16375, &adis16485_timeouts, 0),
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.adis_data = ADIS16480_DATA(16375, &adis16485_timeouts, 0, 0),
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},
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[ADIS16480] = {
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.channels = adis16480_channels,
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@@ -958,7 +956,7 @@ static const struct adis16480_chip_info adis16480_chip_info[] = {
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.max_dec_rate = 2048,
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.has_sleep_cnt = true,
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.filter_freqs = adis16480_def_filter_freqs,
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.adis_data = ADIS16480_DATA(16480, &adis16480_timeouts, 0),
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.adis_data = ADIS16480_DATA(16480, &adis16480_timeouts, 0, 0),
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},
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[ADIS16485] = {
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.channels = adis16485_channels,
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@@ -972,7 +970,7 @@ static const struct adis16480_chip_info adis16480_chip_info[] = {
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.max_dec_rate = 2048,
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.has_sleep_cnt = true,
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.filter_freqs = adis16480_def_filter_freqs,
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.adis_data = ADIS16480_DATA(16485, &adis16485_timeouts, 0),
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.adis_data = ADIS16480_DATA(16485, &adis16485_timeouts, 0, 0),
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},
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[ADIS16488] = {
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.channels = adis16480_channels,
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@@ -986,7 +984,7 @@ static const struct adis16480_chip_info adis16480_chip_info[] = {
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.max_dec_rate = 2048,
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.has_sleep_cnt = true,
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.filter_freqs = adis16480_def_filter_freqs,
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.adis_data = ADIS16480_DATA(16488, &adis16485_timeouts, 0),
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.adis_data = ADIS16480_DATA(16488, &adis16485_timeouts, 0, 0),
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},
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[ADIS16490] = {
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.channels = adis16485_channels,
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@@ -1000,7 +998,7 @@ static const struct adis16480_chip_info adis16480_chip_info[] = {
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.max_dec_rate = 4250,
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.filter_freqs = adis16495_def_filter_freqs,
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.has_pps_clk_mode = true,
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.adis_data = ADIS16480_DATA(16490, &adis16495_timeouts, 0),
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.adis_data = ADIS16480_DATA(16490, &adis16495_timeouts, 0, 0),
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},
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[ADIS16495_1] = {
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.channels = adis16485_channels,
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@@ -1016,7 +1014,8 @@ static const struct adis16480_chip_info adis16480_chip_info[] = {
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.has_pps_clk_mode = true,
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/* 20 elements of 16bits */
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.adis_data = ADIS16480_DATA(16495, &adis16495_1_timeouts,
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ADIS16495_BURST_MAX_DATA * 2),
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ADIS16495_BURST_MAX_DATA * 2,
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6000000),
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},
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[ADIS16495_2] = {
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.channels = adis16485_channels,
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@@ -1032,7 +1031,8 @@ static const struct adis16480_chip_info adis16480_chip_info[] = {
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.has_pps_clk_mode = true,
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/* 20 elements of 16bits */
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.adis_data = ADIS16480_DATA(16495, &adis16495_1_timeouts,
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ADIS16495_BURST_MAX_DATA * 2),
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ADIS16495_BURST_MAX_DATA * 2,
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6000000),
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},
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[ADIS16495_3] = {
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.channels = adis16485_channels,
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@@ -1048,7 +1048,8 @@ static const struct adis16480_chip_info adis16480_chip_info[] = {
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.has_pps_clk_mode = true,
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/* 20 elements of 16bits */
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.adis_data = ADIS16480_DATA(16495, &adis16495_1_timeouts,
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ADIS16495_BURST_MAX_DATA * 2),
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ADIS16495_BURST_MAX_DATA * 2,
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6000000),
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},
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[ADIS16497_1] = {
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.channels = adis16485_channels,
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@@ -1064,7 +1065,8 @@ static const struct adis16480_chip_info adis16480_chip_info[] = {
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.has_pps_clk_mode = true,
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/* 20 elements of 16bits */
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.adis_data = ADIS16480_DATA(16497, &adis16495_1_timeouts,
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ADIS16495_BURST_MAX_DATA * 2),
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ADIS16495_BURST_MAX_DATA * 2,
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6000000),
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},
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[ADIS16497_2] = {
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.channels = adis16485_channels,
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@@ -1080,7 +1082,8 @@ static const struct adis16480_chip_info adis16480_chip_info[] = {
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.has_pps_clk_mode = true,
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/* 20 elements of 16bits */
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.adis_data = ADIS16480_DATA(16497, &adis16495_1_timeouts,
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ADIS16495_BURST_MAX_DATA * 2),
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ADIS16495_BURST_MAX_DATA * 2,
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6000000),
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},
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[ADIS16497_3] = {
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.channels = adis16485_channels,
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@@ -1096,7 +1099,8 @@ static const struct adis16480_chip_info adis16480_chip_info[] = {
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.has_pps_clk_mode = true,
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/* 20 elements of 16bits */
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.adis_data = ADIS16480_DATA(16497, &adis16495_1_timeouts,
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ADIS16495_BURST_MAX_DATA * 2),
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ADIS16495_BURST_MAX_DATA * 2,
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6000000),
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},
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};
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