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arm64: irqflags: Fix clang build warnings

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Clang complains when passing asm operands that are smaller than the
registers they are mapped to:

arch/arm64/include/asm/irqflags.h:50:10: warning: value size does not
	match register size specified by the constraint and modifier
	[-Wasm-operand-widths]
                : "r" (GIC_PRIO_IRQON)

Fix it by casting the affected input operands to a type of the correct
size.

Reported-by: Nathan Chancellor <natechancellor@gmail.com>
Tested-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Julien Thierry <julien.thierry@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
This commit is contained in:
Julien Thierry
2019-02-08 09:36:48 +00:00
committed by Catalin Marinas
parent bc3c03ccb4
commit a80554fc36
1 changed files with 3 additions and 3 deletions
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6
arch/arm64/include/asm/irqflags.h
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@@ -47,7 +47,7 @@ static inline void arch_local_irq_enable(void)
"dsb sy",
ARM64_HAS_IRQ_PRIO_MASKING)
:
: "r" (GIC_PRIO_IRQON)
: "r" ((unsigned long) GIC_PRIO_IRQON)
: "memory");
}
@@ -58,7 +58,7 @@ static inline void arch_local_irq_disable(void)
"msr_s " __stringify(SYS_ICC_PMR_EL1) ", %0",
ARM64_HAS_IRQ_PRIO_MASKING)
:
: "r" (GIC_PRIO_IRQOFF)
: "r" ((unsigned long) GIC_PRIO_IRQOFF)
: "memory");
}
@@ -91,7 +91,7 @@ static inline unsigned long arch_local_save_flags(void)
"csel %0, %0, %2, eq",
ARM64_HAS_IRQ_PRIO_MASKING)
: "=&r" (flags), "+r" (daif_bits)
: "r" (GIC_PRIO_IRQOFF)
: "r" ((unsigned long) GIC_PRIO_IRQOFF)
: "memory");
return flags;