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Merge branch 'net-stmmac-cleanups'
Russell King says: ==================== net: stmmac: cleanups This series removes various redundant items in the stmmac driver: - the unused TBI and RTBI PCS flags - the NULL pointer initialisations for PCS methods in dwxgmac2 - the stmmac_pcs_rane() method which is never called, and it's associated implementations - the redundant netif_carrier_off()s Finally, it replaces asm/io.h with the preferred linux/io.h. ==================== Link: https://lore.kernel.org/r/Zlbp7xdUZAXblOZJ@shell.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
@@ -271,8 +271,6 @@ struct stmmac_safety_stats {
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/* PCS defines */
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#define STMMAC_PCS_RGMII (1 << 0)
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#define STMMAC_PCS_SGMII (1 << 1)
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#define STMMAC_PCS_TBI (1 << 2)
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#define STMMAC_PCS_RTBI (1 << 3)
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#define SF_DMA_MODE 1 /* DMA STORE-AND-FORWARD Operation Mode */
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@@ -605,6 +605,14 @@ static int ethqos_configure_rgmii(struct qcom_ethqos *ethqos)
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return 0;
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}
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static void ethqos_set_serdes_speed(struct qcom_ethqos *ethqos, int speed)
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{
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if (ethqos->serdes_speed != speed) {
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phy_set_speed(ethqos->serdes_phy, speed);
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ethqos->serdes_speed = speed;
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}
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}
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/* On interface toggle MAC registers gets reset.
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* Configure MAC block for SGMII on ethernet phy link up
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*/
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@@ -622,9 +630,7 @@ static int ethqos_configure_sgmii(struct qcom_ethqos *ethqos)
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rgmii_updatel(ethqos, RGMII_CONFIG2_RGMII_CLK_SEL_CFG,
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RGMII_CONFIG2_RGMII_CLK_SEL_CFG,
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RGMII_IO_MACRO_CONFIG2);
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if (ethqos->serdes_speed != SPEED_2500)
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phy_set_speed(ethqos->serdes_phy, SPEED_2500);
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ethqos->serdes_speed = SPEED_2500;
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ethqos_set_serdes_speed(ethqos, SPEED_2500);
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stmmac_pcs_ctrl_ane(priv, priv->ioaddr, 0, 0, 0);
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break;
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case SPEED_1000:
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@@ -632,16 +638,12 @@ static int ethqos_configure_sgmii(struct qcom_ethqos *ethqos)
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rgmii_updatel(ethqos, RGMII_CONFIG2_RGMII_CLK_SEL_CFG,
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RGMII_CONFIG2_RGMII_CLK_SEL_CFG,
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RGMII_IO_MACRO_CONFIG2);
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if (ethqos->serdes_speed != SPEED_1000)
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phy_set_speed(ethqos->serdes_phy, SPEED_1000);
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ethqos->serdes_speed = SPEED_1000;
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ethqos_set_serdes_speed(ethqos, SPEED_1000);
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stmmac_pcs_ctrl_ane(priv, priv->ioaddr, 1, 0, 0);
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break;
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case SPEED_100:
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val |= ETHQOS_MAC_CTRL_PORT_SEL | ETHQOS_MAC_CTRL_SPEED_MODE;
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if (ethqos->serdes_speed != SPEED_1000)
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phy_set_speed(ethqos->serdes_phy, SPEED_1000);
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ethqos->serdes_speed = SPEED_1000;
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ethqos_set_serdes_speed(ethqos, SPEED_1000);
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stmmac_pcs_ctrl_ane(priv, priv->ioaddr, 1, 0, 0);
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break;
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case SPEED_10:
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@@ -651,9 +653,7 @@ static int ethqos_configure_sgmii(struct qcom_ethqos *ethqos)
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FIELD_PREP(RGMII_CONFIG_SGMII_CLK_DVDR,
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SGMII_10M_RX_CLK_DVDR),
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RGMII_IO_MACRO_CONFIG);
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if (ethqos->serdes_speed != SPEED_1000)
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phy_set_speed(ethqos->serdes_phy, ethqos->speed);
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ethqos->serdes_speed = SPEED_1000;
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ethqos_set_serdes_speed(ethqos, SPEED_1000);
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stmmac_pcs_ctrl_ane(priv, priv->ioaddr, 1, 0, 0);
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break;
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}
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@@ -15,7 +15,7 @@
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#include <linux/crc32.h>
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#include <linux/slab.h>
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#include <linux/ethtool.h>
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#include <asm/io.h>
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#include <linux/io.h>
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#include "stmmac.h"
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#include "stmmac_pcs.h"
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#include "dwmac1000.h"
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@@ -404,11 +404,6 @@ static void dwmac1000_ctrl_ane(void __iomem *ioaddr, bool ane, bool srgmi_ral,
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dwmac_ctrl_ane(ioaddr, GMAC_PCS_BASE, ane, srgmi_ral, loopback);
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}
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static void dwmac1000_rane(void __iomem *ioaddr, bool restart)
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{
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dwmac_rane(ioaddr, GMAC_PCS_BASE, restart);
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}
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static void dwmac1000_get_adv_lp(void __iomem *ioaddr, struct rgmii_adv *adv)
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{
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dwmac_get_adv_lp(ioaddr, GMAC_PCS_BASE, adv);
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@@ -519,7 +514,6 @@ const struct stmmac_ops dwmac1000_ops = {
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.set_eee_pls = dwmac1000_set_eee_pls,
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.debug = dwmac1000_debug,
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.pcs_ctrl_ane = dwmac1000_ctrl_ane,
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.pcs_rane = dwmac1000_rane,
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.pcs_get_adv_lp = dwmac1000_get_adv_lp,
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.set_mac_loopback = dwmac1000_set_mac_loopback,
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};
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@@ -12,7 +12,7 @@
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Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
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*******************************************************************************/
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#include <asm/io.h>
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#include <linux/io.h>
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#include "dwmac1000.h"
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#include "dwmac_dma.h"
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@@ -15,7 +15,7 @@
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*******************************************************************************/
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#include <linux/crc32.h>
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#include <asm/io.h>
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#include <linux/io.h>
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#include "stmmac.h"
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#include "dwmac100.h"
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@@ -14,7 +14,7 @@
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Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
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*******************************************************************************/
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#include <asm/io.h>
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#include <linux/io.h>
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#include "dwmac100.h"
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#include "dwmac_dma.h"
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@@ -758,11 +758,6 @@ static void dwmac4_ctrl_ane(void __iomem *ioaddr, bool ane, bool srgmi_ral,
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dwmac_ctrl_ane(ioaddr, GMAC_PCS_BASE, ane, srgmi_ral, loopback);
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}
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static void dwmac4_rane(void __iomem *ioaddr, bool restart)
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{
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dwmac_rane(ioaddr, GMAC_PCS_BASE, restart);
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}
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static void dwmac4_get_adv_lp(void __iomem *ioaddr, struct rgmii_adv *adv)
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{
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dwmac_get_adv_lp(ioaddr, GMAC_PCS_BASE, adv);
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@@ -1215,7 +1210,6 @@ const struct stmmac_ops dwmac4_ops = {
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.set_eee_timer = dwmac4_set_eee_timer,
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.set_eee_pls = dwmac4_set_eee_pls,
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.pcs_ctrl_ane = dwmac4_ctrl_ane,
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.pcs_rane = dwmac4_rane,
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.pcs_get_adv_lp = dwmac4_get_adv_lp,
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.debug = dwmac4_debug,
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.set_filter = dwmac4_set_filter,
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@@ -1260,7 +1254,6 @@ const struct stmmac_ops dwmac410_ops = {
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.set_eee_timer = dwmac4_set_eee_timer,
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.set_eee_pls = dwmac4_set_eee_pls,
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.pcs_ctrl_ane = dwmac4_ctrl_ane,
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.pcs_rane = dwmac4_rane,
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.pcs_get_adv_lp = dwmac4_get_adv_lp,
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.debug = dwmac4_debug,
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.set_filter = dwmac4_set_filter,
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@@ -1309,7 +1302,6 @@ const struct stmmac_ops dwmac510_ops = {
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.set_eee_timer = dwmac4_set_eee_timer,
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.set_eee_pls = dwmac4_set_eee_pls,
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.pcs_ctrl_ane = dwmac4_ctrl_ane,
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.pcs_rane = dwmac4_rane,
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.pcs_get_adv_lp = dwmac4_get_adv_lp,
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.debug = dwmac4_debug,
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.set_filter = dwmac4_set_filter,
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@@ -1554,9 +1554,6 @@ const struct stmmac_ops dwxgmac210_ops = {
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.reset_eee_mode = dwxgmac2_reset_eee_mode,
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.set_eee_timer = dwxgmac2_set_eee_timer,
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.set_eee_pls = dwxgmac2_set_eee_pls,
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.pcs_ctrl_ane = NULL,
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.pcs_rane = NULL,
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.pcs_get_adv_lp = NULL,
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.debug = NULL,
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.set_filter = dwxgmac2_set_filter,
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.safety_feat_config = dwxgmac3_safety_feat_config,
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@@ -1614,9 +1611,6 @@ const struct stmmac_ops dwxlgmac2_ops = {
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.reset_eee_mode = dwxgmac2_reset_eee_mode,
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.set_eee_timer = dwxgmac2_set_eee_timer,
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.set_eee_pls = dwxgmac2_set_eee_pls,
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.pcs_ctrl_ane = NULL,
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.pcs_rane = NULL,
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.pcs_get_adv_lp = NULL,
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.debug = NULL,
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.set_filter = dwxgmac2_set_filter,
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.safety_feat_config = dwxgmac3_safety_feat_config,
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@@ -370,7 +370,6 @@ struct stmmac_ops {
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/* PCS calls */
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void (*pcs_ctrl_ane)(void __iomem *ioaddr, bool ane, bool srgmi_ral,
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bool loopback);
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void (*pcs_rane)(void __iomem *ioaddr, bool restart);
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void (*pcs_get_adv_lp)(void __iomem *ioaddr, struct rgmii_adv *adv);
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/* Safety Features */
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int (*safety_feat_config)(void __iomem *ioaddr, unsigned int asp,
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@@ -484,8 +483,6 @@ struct stmmac_ops {
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stmmac_do_void_callback(__priv, mac, debug, __priv, __args)
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#define stmmac_pcs_ctrl_ane(__priv, __args...) \
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stmmac_do_void_callback(__priv, mac, pcs_ctrl_ane, __args)
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#define stmmac_pcs_rane(__priv, __args...) \
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stmmac_do_void_callback(__priv, mac, pcs_rane, __priv, __args)
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#define stmmac_pcs_get_adv_lp(__priv, __args...) \
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stmmac_do_void_callback(__priv, mac, pcs_get_adv_lp, __args)
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#define stmmac_safety_feat_config(__priv, __args...) \
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@@ -11,10 +11,10 @@
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#include <linux/etherdevice.h>
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#include <linux/ethtool.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/mii.h>
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#include <linux/phylink.h>
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#include <linux/net_tstamp.h>
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#include <asm/io.h>
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#include "stmmac.h"
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#include "dwmac_dma.h"
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@@ -471,13 +471,6 @@ bool stmmac_eee_init(struct stmmac_priv *priv)
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{
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int eee_tw_timer = priv->eee_tw_timer;
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/* Using PCS we cannot dial with the phy registers at this stage
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* so we do not support extra feature like EEE.
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*/
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if (priv->hw->pcs == STMMAC_PCS_TBI ||
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priv->hw->pcs == STMMAC_PCS_RTBI)
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return false;
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/* Check if MAC core supports the EEE feature. */
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if (!priv->dma_cap.eee)
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return false;
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@@ -3953,9 +3946,7 @@ static int __stmmac_open(struct net_device *dev,
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if (ret < 0)
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return ret;
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if (priv->hw->pcs != STMMAC_PCS_TBI &&
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priv->hw->pcs != STMMAC_PCS_RTBI &&
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(!priv->hw->xpcs ||
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if ((!priv->hw->xpcs ||
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xpcs_get_an_mode(priv->hw->xpcs, mode) != DW_AN_C73)) {
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ret = stmmac_init_phy(dev);
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if (ret) {
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@@ -4097,8 +4088,6 @@ static int stmmac_release(struct net_device *dev)
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if (priv->plat->serdes_powerdown)
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priv->plat->serdes_powerdown(dev, priv->plat->bsp_priv);
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netif_carrier_off(dev);
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stmmac_release_ptp(priv);
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pm_runtime_put(priv->device);
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@@ -7739,16 +7728,12 @@ int stmmac_dvr_probe(struct device *device,
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if (!pm_runtime_enabled(device))
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pm_runtime_enable(device);
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if (priv->hw->pcs != STMMAC_PCS_TBI &&
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priv->hw->pcs != STMMAC_PCS_RTBI) {
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/* MDIO bus Registration */
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ret = stmmac_mdio_register(ndev);
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if (ret < 0) {
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dev_err_probe(priv->device, ret,
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"%s: MDIO bus (id: %d) registration failed\n",
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__func__, priv->plat->bus_id);
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goto error_mdio_register;
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}
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ret = stmmac_mdio_register(ndev);
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if (ret < 0) {
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dev_err_probe(priv->device, ret,
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"MDIO bus (id: %d) registration failed\n",
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priv->plat->bus_id);
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goto error_mdio_register;
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}
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if (priv->plat->speed_mode_2500)
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@@ -7790,9 +7775,7 @@ error_netdev_register:
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error_phy_setup:
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stmmac_pcs_clean(ndev);
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error_pcs_setup:
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if (priv->hw->pcs != STMMAC_PCS_TBI &&
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priv->hw->pcs != STMMAC_PCS_RTBI)
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stmmac_mdio_unregister(ndev);
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stmmac_mdio_unregister(ndev);
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error_mdio_register:
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stmmac_napi_del(ndev);
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error_hw_init:
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@@ -7821,7 +7804,6 @@ void stmmac_dvr_remove(struct device *dev)
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stmmac_stop_all_dma(priv);
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stmmac_mac_set(priv, priv->ioaddr, false);
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netif_carrier_off(ndev);
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unregister_netdev(ndev);
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#ifdef CONFIG_DEBUG_FS
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@@ -7833,10 +7815,8 @@ void stmmac_dvr_remove(struct device *dev)
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reset_control_assert(priv->plat->stmmac_ahb_rst);
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stmmac_pcs_clean(ndev);
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stmmac_mdio_unregister(ndev);
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if (priv->hw->pcs != STMMAC_PCS_TBI &&
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priv->hw->pcs != STMMAC_PCS_RTBI)
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stmmac_mdio_unregister(ndev);
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destroy_workqueue(priv->wq);
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mutex_destroy(&priv->lock);
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bitmap_free(priv->af_xdp_zc_qps);
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@@ -74,23 +74,6 @@ static inline void dwmac_pcs_isr(void __iomem *ioaddr, u32 reg,
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}
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}
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/**
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* dwmac_rane - To restart ANE
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* @ioaddr: IO registers pointer
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* @reg: Base address of the AN Control Register.
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* @restart: to restart ANE
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* Description: this is to just restart the Auto-Negotiation.
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*/
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static inline void dwmac_rane(void __iomem *ioaddr, u32 reg, bool restart)
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{
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u32 value = readl(ioaddr + GMAC_AN_CTRL(reg));
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if (restart)
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value |= GMAC_AN_CTRL_RAN;
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writel(value, ioaddr + GMAC_AN_CTRL(reg));
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}
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/**
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* dwmac_ctrl_ane - To program the AN Control Register.
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* @ioaddr: IO registers pointer
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