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Merge tag 'spi-mosi-config' into togreg
spi: Support MOSI idle configuration Add support for configuring the idle state of the MOSI signal in controllers.
This commit is contained in:
Jonathan Cameron
197
Documentation/devicetree/bindings/iio/adc/adi,ad4000.yaml
Normal file
197
Documentation/devicetree/bindings/iio/adc/adi,ad4000.yaml
Normal file
@@ -0,0 +1,197 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/iio/adc/adi,ad4000.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Analog Devices AD4000 and similar Analog to Digital Converters
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maintainers:
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- Marcelo Schmitt <marcelo.schmitt@analog.com>
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description: |
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Analog Devices AD4000 family of Analog to Digital Converters with SPI support.
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Specifications can be found at:
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https://www.analog.com/media/en/technical-documentation/data-sheets/ad4000-4004-4008.pdf
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https://www.analog.com/media/en/technical-documentation/data-sheets/ad4001-4005.pdf
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https://www.analog.com/media/en/technical-documentation/data-sheets/ad4002-4006-4010.pdf
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https://www.analog.com/media/en/technical-documentation/data-sheets/ad4003-4007-4011.pdf
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https://www.analog.com/media/en/technical-documentation/data-sheets/ad4020-4021-4022.pdf
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https://www.analog.com/media/en/technical-documentation/data-sheets/adaq4001.pdf
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https://www.analog.com/media/en/technical-documentation/data-sheets/adaq4003.pdf
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$ref: /schemas/spi/spi-peripheral-props.yaml#
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properties:
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compatible:
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oneOf:
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- const: adi,ad4000
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- items:
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- enum:
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- adi,ad4004
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- adi,ad4008
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- const: adi,ad4000
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- const: adi,ad4001
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- items:
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- enum:
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- adi,ad4005
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- const: adi,ad4001
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- const: adi,ad4002
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- items:
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- enum:
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- adi,ad4006
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- adi,ad4010
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- const: adi,ad4002
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- const: adi,ad4003
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- items:
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- enum:
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- adi,ad4007
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- adi,ad4011
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- const: adi,ad4003
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- const: adi,ad4020
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- items:
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- enum:
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- adi,ad4021
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- adi,ad4022
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- const: adi,ad4020
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- const: adi,adaq4001
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- const: adi,adaq4003
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reg:
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maxItems: 1
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spi-max-frequency:
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maximum: 102040816 # for VIO > 2.7 V, 81300813 for VIO > 1.7 V
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adi,sdi-pin:
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$ref: /schemas/types.yaml#/definitions/string
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enum: [ high, low, cs, sdi ]
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default: sdi
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description:
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Describes how the ADC SDI pin is wired. A value of "sdi" indicates that
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the ADC SDI is connected to host SDO. "high" indicates that the ADC SDI
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pin is hard-wired to logic high (VIO). "low" indicates that it is
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hard-wired low (GND). "cs" indicates that the ADC SDI pin is connected to
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the host CS line.
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'#daisy-chained-devices': true
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vdd-supply:
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description: A 1.8V supply that powers the chip (VDD).
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vio-supply:
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description:
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A 1.8V to 5.5V supply for the digital inputs and outputs (VIO).
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ref-supply:
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description:
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A 2.5 to 5V supply for the external reference voltage (REF).
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cnv-gpios:
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description:
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When provided, this property indicates the GPIO that is connected to the
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CNV pin.
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maxItems: 1
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adi,high-z-input:
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type: boolean
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description:
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High-Z mode allows the amplifier and RC filter in front of the ADC to be
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chosen based on the signal bandwidth of interest, rather than the settling
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requirements of the switched capacitor SAR ADC inputs.
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adi,gain-milli:
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description: |
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The hardware gain applied to the ADC input (in milli units).
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The gain provided by the ADC input scaler is defined by the hardware
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connections between chip pins OUT+, R1K-, R1K1-, R1K+, R1K1+, and OUT-.
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If not present, default to 1000 (no actual gain applied).
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$ref: /schemas/types.yaml#/definitions/uint16
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enum: [454, 909, 1000, 1900]
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default: 1000
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interrupts:
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description:
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The SDO pin can also function as a busy indicator. This node should be
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connected to an interrupt that is triggered when the SDO line goes low
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while the SDI line is high and the CNV line is low ("3-wire" mode) or the
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SDI line is low and the CNV line is high ("4-wire" mode); or when the SDO
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line goes high while the SDI and CNV lines are high (chain mode),
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maxItems: 1
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required:
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- compatible
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- reg
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- vdd-supply
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- vio-supply
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- ref-supply
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allOf:
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# The configuration register can only be accessed if SDI is connected to MOSI
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- if:
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required:
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- adi,sdi-pin
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then:
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properties:
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adi,high-z-input: false
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# chain mode has lower SCLK max rate
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- if:
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required:
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- '#daisy-chained-devices'
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then:
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properties:
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spi-max-frequency:
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maximum: 50000000 # for VIO > 2.7 V, 40000000 for VIO > 1.7 V
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# Gain property only applies to ADAQ devices
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- if:
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properties:
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compatible:
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not:
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contains:
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enum:
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- adi,adaq4001
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- adi,adaq4003
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then:
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properties:
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adi,gain-milli: false
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/gpio/gpio.h>
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spi {
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#address-cells = <1>;
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#size-cells = <0>;
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adc@0 {
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compatible = "adi,ad4020";
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reg = <0>;
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spi-max-frequency = <71000000>;
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vdd-supply = <&supply_1_8V>;
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vio-supply = <&supply_1_8V>;
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ref-supply = <&supply_5V>;
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adi,sdi-pin = "cs";
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cnv-gpios = <&gpio0 88 GPIO_ACTIVE_HIGH>;
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};
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};
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- |
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spi {
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#address-cells = <1>;
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#size-cells = <0>;
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adc@0 {
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compatible = "adi,adaq4003";
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reg = <0>;
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spi-max-frequency = <80000000>;
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vdd-supply = <&supply_1_8V>;
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vio-supply = <&supply_1_8V>;
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ref-supply = <&supply_5V>;
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adi,high-z-input;
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adi,gain-milli = /bits/ 16 <454>;
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};
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};
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@@ -614,6 +614,89 @@ queue, and then start some asynchronous transfer engine (unless it's
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already running).
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Extensions to the SPI protocol
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------------------------------
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The fact that SPI doesn't have a formal specification or standard permits chip
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manufacturers to implement the SPI protocol in slightly different ways. In most
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cases, SPI protocol implementations from different vendors are compatible among
|
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each other. For example, in SPI mode 0 (CPOL=0, CPHA=0) the bus lines may behave
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like the following:
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|
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::
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nCSx ___ ___
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\_________________________________________________________________/
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• •
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• •
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SCLK ___ ___ ___ ___ ___ ___ ___ ___
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_______/ \___/ \___/ \___/ \___/ \___/ \___/ \___/ \_____
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• : ; : ; : ; : ; : ; : ; : ; : ; •
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• : ; : ; : ; : ; : ; : ; : ; : ; •
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MOSI XXX__________ _______ _______ ________XXX
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0xA5 XXX__/ 1 \_0_____/ 1 \_0_______0_____/ 1 \_0_____/ 1 \_XXX
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• ; ; ; ; ; ; ; ; •
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• ; ; ; ; ; ; ; ; •
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MISO XXX__________ _______________________ _______ XXX
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0xBA XXX__/ 1 \_____0_/ 1 1 1 \_____0__/ 1 \____0__XXX
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Legend::
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• marks the start/end of transmission;
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: marks when data is clocked into the peripheral;
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; marks when data is clocked into the controller;
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X marks when line states are not specified.
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|
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In some few cases, chips extend the SPI protocol by specifying line behaviors
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that other SPI protocols don't (e.g. data line state for when CS is not
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asserted). Those distinct SPI protocols, modes, and configurations are supported
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by different SPI mode flags.
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MOSI idle state configuration
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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Common SPI protocol implementations don't specify any state or behavior for the
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MOSI line when the controller is not clocking out data. However, there do exist
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peripherals that require specific MOSI line state when data is not being clocked
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out. For example, if the peripheral expects the MOSI line to be high when the
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controller is not clocking out data (``SPI_MOSI_IDLE_HIGH``), then a transfer in
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SPI mode 0 would look like the following:
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::
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nCSx ___ ___
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\_________________________________________________________________/
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• •
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• •
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SCLK ___ ___ ___ ___ ___ ___ ___ ___
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_______/ \___/ \___/ \___/ \___/ \___/ \___/ \___/ \_____
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• : ; : ; : ; : ; : ; : ; : ; : ; •
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• : ; : ; : ; : ; : ; : ; : ; : ; •
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MOSI _____ _______ _______ _______________ ___
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0x56 \_0_____/ 1 \_0_____/ 1 \_0_____/ 1 1 \_0_____/
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• ; ; ; ; ; ; ; ; •
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• ; ; ; ; ; ; ; ; •
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MISO XXX__________ _______________________ _______ XXX
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0xBA XXX__/ 1 \_____0_/ 1 1 1 \_____0__/ 1 \____0__XXX
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Legend::
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||||
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||||
• marks the start/end of transmission;
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: marks when data is clocked into the peripheral;
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; marks when data is clocked into the controller;
|
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X marks when line states are not specified.
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|
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In this extension to the usual SPI protocol, the MOSI line state is specified to
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be kept high when CS is asserted but the controller is not clocking out data to
|
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the peripheral and also when CS is not asserted.
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Peripherals that require this extension must request it by setting the
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``SPI_MOSI_IDLE_HIGH`` bit into the mode attribute of their ``struct
|
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spi_device`` and call spi_setup(). Controllers that support this extension
|
||||
should indicate it by setting ``SPI_MOSI_IDLE_HIGH`` in the mode_bits attribute
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of their ``struct spi_controller``. The configuration to idle MOSI low is
|
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analogous but uses the ``SPI_MOSI_IDLE_LOW`` mode bit.
|
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|
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|
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THANKS TO
|
||||
---------
|
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Contributors to Linux-SPI discussions include (in alphabetical order,
|
||||
|
||||
@@ -1214,6 +1214,13 @@ W: https://ez.analog.com/linux-software-drivers
|
||||
F: Documentation/devicetree/bindings/iio/dac/adi,ad3552r.yaml
|
||||
F: drivers/iio/dac/ad3552r.c
|
||||
|
||||
ANALOG DEVICES INC AD4000 DRIVER
|
||||
M: Marcelo Schmitt <marcelo.schmitt@analog.com>
|
||||
L: linux-iio@vger.kernel.org
|
||||
S: Supported
|
||||
W: https://ez.analog.com/linux-software-drivers
|
||||
F: Documentation/devicetree/bindings/iio/adc/adi,ad4000.yaml
|
||||
|
||||
ANALOG DEVICES INC AD4130 DRIVER
|
||||
M: Cosmin Tanislav <cosmin.tanislav@analog.com>
|
||||
L: linux-iio@vger.kernel.org
|
||||
|
||||
@@ -41,6 +41,7 @@
|
||||
#define SPI_ENGINE_CONFIG_CPHA BIT(0)
|
||||
#define SPI_ENGINE_CONFIG_CPOL BIT(1)
|
||||
#define SPI_ENGINE_CONFIG_3WIRE BIT(2)
|
||||
#define SPI_ENGINE_CONFIG_SDO_IDLE_HIGH BIT(3)
|
||||
|
||||
#define SPI_ENGINE_INST_TRANSFER 0x0
|
||||
#define SPI_ENGINE_INST_ASSERT 0x1
|
||||
@@ -137,6 +138,10 @@ static unsigned int spi_engine_get_config(struct spi_device *spi)
|
||||
config |= SPI_ENGINE_CONFIG_CPHA;
|
||||
if (spi->mode & SPI_3WIRE)
|
||||
config |= SPI_ENGINE_CONFIG_3WIRE;
|
||||
if (spi->mode & SPI_MOSI_IDLE_HIGH)
|
||||
config |= SPI_ENGINE_CONFIG_SDO_IDLE_HIGH;
|
||||
if (spi->mode & SPI_MOSI_IDLE_LOW)
|
||||
config &= ~SPI_ENGINE_CONFIG_SDO_IDLE_HIGH;
|
||||
|
||||
return config;
|
||||
}
|
||||
@@ -692,9 +697,13 @@ static int spi_engine_probe(struct platform_device *pdev)
|
||||
host->num_chipselect = 8;
|
||||
|
||||
/* Some features depend of the IP core version. */
|
||||
if (ADI_AXI_PCORE_VER_MINOR(version) >= 2) {
|
||||
host->mode_bits |= SPI_CS_HIGH;
|
||||
host->setup = spi_engine_setup;
|
||||
if (ADI_AXI_PCORE_VER_MAJOR(version) >= 1) {
|
||||
if (ADI_AXI_PCORE_VER_MINOR(version) >= 2) {
|
||||
host->mode_bits |= SPI_CS_HIGH;
|
||||
host->setup = spi_engine_setup;
|
||||
}
|
||||
if (ADI_AXI_PCORE_VER_MINOR(version) >= 3)
|
||||
host->mode_bits |= SPI_MOSI_IDLE_LOW | SPI_MOSI_IDLE_HIGH;
|
||||
}
|
||||
|
||||
if (host->max_speed_hz == 0)
|
||||
|
||||
@@ -54,21 +54,28 @@ static unsigned int bitbang_txrx_8(struct spi_device *spi,
|
||||
struct spi_transfer *t,
|
||||
unsigned int flags)
|
||||
{
|
||||
struct spi_bitbang *bitbang;
|
||||
unsigned int bits = t->bits_per_word;
|
||||
unsigned int count = t->len;
|
||||
const u8 *tx = t->tx_buf;
|
||||
u8 *rx = t->rx_buf;
|
||||
|
||||
bitbang = spi_controller_get_devdata(spi->controller);
|
||||
while (likely(count > 0)) {
|
||||
u8 word = 0;
|
||||
|
||||
if (tx)
|
||||
word = *tx++;
|
||||
else
|
||||
word = spi->mode & SPI_MOSI_IDLE_HIGH ? 0xFF : 0;
|
||||
word = txrx_word(spi, ns, word, bits, flags);
|
||||
if (rx)
|
||||
*rx++ = word;
|
||||
count -= 1;
|
||||
}
|
||||
if (bitbang->set_mosi_idle)
|
||||
bitbang->set_mosi_idle(spi);
|
||||
|
||||
return t->len - count;
|
||||
}
|
||||
|
||||
@@ -78,21 +85,28 @@ static unsigned int bitbang_txrx_16(struct spi_device *spi,
|
||||
struct spi_transfer *t,
|
||||
unsigned int flags)
|
||||
{
|
||||
struct spi_bitbang *bitbang;
|
||||
unsigned int bits = t->bits_per_word;
|
||||
unsigned int count = t->len;
|
||||
const u16 *tx = t->tx_buf;
|
||||
u16 *rx = t->rx_buf;
|
||||
|
||||
bitbang = spi_controller_get_devdata(spi->controller);
|
||||
while (likely(count > 1)) {
|
||||
u16 word = 0;
|
||||
|
||||
if (tx)
|
||||
word = *tx++;
|
||||
else
|
||||
word = spi->mode & SPI_MOSI_IDLE_HIGH ? 0xFFFF : 0;
|
||||
word = txrx_word(spi, ns, word, bits, flags);
|
||||
if (rx)
|
||||
*rx++ = word;
|
||||
count -= 2;
|
||||
}
|
||||
if (bitbang->set_mosi_idle)
|
||||
bitbang->set_mosi_idle(spi);
|
||||
|
||||
return t->len - count;
|
||||
}
|
||||
|
||||
@@ -102,21 +116,28 @@ static unsigned int bitbang_txrx_32(struct spi_device *spi,
|
||||
struct spi_transfer *t,
|
||||
unsigned int flags)
|
||||
{
|
||||
struct spi_bitbang *bitbang;
|
||||
unsigned int bits = t->bits_per_word;
|
||||
unsigned int count = t->len;
|
||||
const u32 *tx = t->tx_buf;
|
||||
u32 *rx = t->rx_buf;
|
||||
|
||||
bitbang = spi_controller_get_devdata(spi->controller);
|
||||
while (likely(count > 3)) {
|
||||
u32 word = 0;
|
||||
|
||||
if (tx)
|
||||
word = *tx++;
|
||||
else
|
||||
word = spi->mode & SPI_MOSI_IDLE_HIGH ? 0xFFFFFFFF : 0;
|
||||
word = txrx_word(spi, ns, word, bits, flags);
|
||||
if (rx)
|
||||
*rx++ = word;
|
||||
count -= 4;
|
||||
}
|
||||
if (bitbang->set_mosi_idle)
|
||||
bitbang->set_mosi_idle(spi);
|
||||
|
||||
return t->len - count;
|
||||
}
|
||||
|
||||
@@ -192,6 +213,9 @@ int spi_bitbang_setup(struct spi_device *spi)
|
||||
goto err_free;
|
||||
}
|
||||
|
||||
if (bitbang->set_mosi_idle)
|
||||
bitbang->set_mosi_idle(spi);
|
||||
|
||||
dev_dbg(&spi->dev, "%s, %u nsec/bit\n", __func__, 2 * cs->nsecs);
|
||||
|
||||
return 0;
|
||||
|
||||
@@ -236,6 +236,14 @@ static void spi_gpio_chipselect(struct spi_device *spi, int is_active)
|
||||
}
|
||||
}
|
||||
|
||||
static void spi_gpio_set_mosi_idle(struct spi_device *spi)
|
||||
{
|
||||
struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
|
||||
|
||||
gpiod_set_value_cansleep(spi_gpio->mosi,
|
||||
!!(spi->mode & SPI_MOSI_IDLE_HIGH));
|
||||
}
|
||||
|
||||
static int spi_gpio_setup(struct spi_device *spi)
|
||||
{
|
||||
struct gpio_desc *cs;
|
||||
@@ -389,7 +397,8 @@ static int spi_gpio_probe(struct platform_device *pdev)
|
||||
|
||||
host->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
|
||||
host->mode_bits = SPI_3WIRE | SPI_3WIRE_HIZ | SPI_CPHA | SPI_CPOL |
|
||||
SPI_CS_HIGH | SPI_LSB_FIRST;
|
||||
SPI_CS_HIGH | SPI_LSB_FIRST | SPI_MOSI_IDLE_LOW |
|
||||
SPI_MOSI_IDLE_HIGH;
|
||||
if (!spi_gpio->mosi) {
|
||||
/* HW configuration without MOSI pin
|
||||
*
|
||||
@@ -414,6 +423,7 @@ static int spi_gpio_probe(struct platform_device *pdev)
|
||||
host->flags |= SPI_CONTROLLER_GPIO_SS;
|
||||
bb->chipselect = spi_gpio_chipselect;
|
||||
bb->set_line_direction = spi_gpio_set_direction;
|
||||
bb->set_mosi_idle = spi_gpio_set_mosi_idle;
|
||||
|
||||
if (host->flags & SPI_CONTROLLER_NO_TX) {
|
||||
bb->txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0;
|
||||
|
||||
@@ -3921,6 +3921,12 @@ int spi_setup(struct spi_device *spi)
|
||||
(SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTAL |
|
||||
SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL)))
|
||||
return -EINVAL;
|
||||
/* Check against conflicting MOSI idle configuration */
|
||||
if ((spi->mode & SPI_MOSI_IDLE_LOW) && (spi->mode & SPI_MOSI_IDLE_HIGH)) {
|
||||
dev_err(&spi->dev,
|
||||
"setup: MOSI configured to idle low and high at the same time.\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
/*
|
||||
* Help drivers fail *cleanly* when they need options
|
||||
* that aren't supported with their current controller.
|
||||
|
||||
@@ -24,6 +24,7 @@ struct spi_bitbang {
|
||||
#define BITBANG_CS_ACTIVE 1 /* normally nCS, active low */
|
||||
#define BITBANG_CS_INACTIVE 0
|
||||
|
||||
void (*set_mosi_idle)(struct spi_device *spi);
|
||||
/* txrx_bufs() may handle dma mapping for transfers that don't
|
||||
* already have one (transfer.{tx,rx}_dma is zero), or use PIO
|
||||
*/
|
||||
|
||||
@@ -28,7 +28,8 @@
|
||||
#define SPI_RX_OCTAL _BITUL(14) /* receive with 8 wires */
|
||||
#define SPI_3WIRE_HIZ _BITUL(15) /* high impedance turnaround */
|
||||
#define SPI_RX_CPHA_FLIP _BITUL(16) /* flip CPHA on Rx only xfer */
|
||||
#define SPI_MOSI_IDLE_LOW _BITUL(17) /* leave mosi line low when idle */
|
||||
#define SPI_MOSI_IDLE_LOW _BITUL(17) /* leave MOSI line low when idle */
|
||||
#define SPI_MOSI_IDLE_HIGH _BITUL(18) /* leave MOSI line high when idle */
|
||||
|
||||
/*
|
||||
* All the bits defined above should be covered by SPI_MODE_USER_MASK.
|
||||
@@ -38,6 +39,6 @@
|
||||
* These bits must not overlap. A static assert check should make sure of that.
|
||||
* If adding extra bits, make sure to increase the bit index below as well.
|
||||
*/
|
||||
#define SPI_MODE_USER_MASK (_BITUL(18) - 1)
|
||||
#define SPI_MODE_USER_MASK (_BITUL(19) - 1)
|
||||
|
||||
#endif /* _UAPI_SPI_H */
|
||||
|
||||
Reference in New Issue
Block a user