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ACPI: SPCR: Add support for DBG2 RISC-V SBI port subtype

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Commit 4aca2bef90 ("ACPICA: Headers: Add RISC-V SBI Subtype to
DBG2") added the definition of ACPI_DBG2_RISCV_SBI_CON.

Continue to implement its function so that the parameters of UART can
be configured correctly.

Subsequent calls to setup_earlycon() will reuse the earlycon based on
SBI.

Signed-off-by: Chen Pei <cp0613@linux.alibaba.com>
Reviewed-by: Guo Ren (Alibaba Damo Academy) <guoren@kernel.org>
Link: https://patch.msgid.link/20250910094136.4423-1-cp0613@linux.alibaba.com
[ rjw: Changelog edits ]
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
This commit is contained in:
Chen Pei
2025-09-10 17:41:36 +08:00
committed by Rafael J. Wysocki
parent f83ec76bf2
commit bf4206d7ac
1 changed files with 3 additions and 0 deletions
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3
drivers/acpi/spcr.c
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@@ -141,6 +141,9 @@ int __init acpi_parse_spcr(bool enable_earlycon, bool enable_console)
case ACPI_DBG2_16550_NVIDIA:
uart = "uart";
break;
case ACPI_DBG2_RISCV_SBI_CON:
uart = "sbi";
break;
default:
err = -ENOENT;
goto done;