cxl: Sync up the driver-api/cxl documentation

pmem.c regs.c mbox.c identifiers were missing. Add them to
memory-devices.rst following their respective DOC comment includes.

Two acpi.c identifiers were available, but not used in kernel-doc's:
1) Add add_cxl_resources to memory-devices.rst and fix up the Sphinx
complaint on the ascii art by escaping it.
2) Add cxl_acpi_evaluate_qtg_dsm to access-coordinates.rst.

core/features.c is new. Add a "DOC: cxl features" comment to the
source and identifiers to memory_devices.rst.

Signed-off-by: Alison Schofield <alison.schofield@intel.com>
Reviewed-by: Ira Weiny <ira.weiny@intel.com>
Link: https://patch.msgid.link/20250513215813.1419645-1-alison.schofield@intel.com
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
This commit is contained in:
Alison Schofield
2025-05-13 14:58:09 -07:00
committed by Dave Jiang
parent 58dfd95956
commit d542461211
4 changed files with 33 additions and 3 deletions

View File

@@ -90,3 +90,6 @@ under the same ACPI0017 device to form a new xarray.
Finally, the cxl_region_update_bandwidth() is called and the aggregated
bandwidth from all the members of the last xarray is updated for the
access coordinates residing in the cxl region (cxlr) context.
.. kernel-doc:: drivers/cxl/acpi.c
:identifiers: cxl_acpi_evaluate_qtg_dsm

View File

@@ -347,6 +347,9 @@ CXL Core
.. kernel-doc:: drivers/cxl/cxl.h
:internal:
.. kernel-doc:: drivers/cxl/acpi.c
:identifiers: add_cxl_resources
.. kernel-doc:: drivers/cxl/core/hdm.c
:doc: cxl core hdm
@@ -371,12 +374,27 @@ CXL Core
.. kernel-doc:: drivers/cxl/core/pmem.c
:doc: cxl pmem
.. kernel-doc:: drivers/cxl/core/pmem.c
:identifiers:
.. kernel-doc:: drivers/cxl/core/regs.c
:doc: cxl registers
.. kernel-doc:: drivers/cxl/core/regs.c
:identifiers:
.. kernel-doc:: drivers/cxl/core/mbox.c
:doc: cxl mbox
.. kernel-doc:: drivers/cxl/core/mbox.c
:identifiers:
.. kernel-doc:: drivers/cxl/core/features.c
:doc: cxl features
.. kernel-doc:: drivers/cxl/core/features.c
:identifiers:
CXL Regions
-----------
.. kernel-doc:: drivers/cxl/core/region.c

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@@ -749,10 +749,10 @@ static void remove_cxl_resources(void *data)
* expanding its boundaries to ensure that any conflicting resources become
* children. If a window is expanded it may then conflict with a another window
* entry and require the window to be truncated or trimmed. Consider this
* situation:
* situation::
*
* |-- "CXL Window 0" --||----- "CXL Window 1" -----|
* |--------------- "System RAM" -------------|
* |-- "CXL Window 0" --||----- "CXL Window 1" -----|
* |--------------- "System RAM" -------------|
*
* ...where platform firmware has established as System RAM resource across 2
* windows, but has left some portion of window 1 for dynamic CXL region

View File

@@ -9,6 +9,15 @@
#include "core.h"
#include "cxlmem.h"
/**
* DOC: cxl features
*
* A CXL device that includes a mailbox supports commands that allows
* listing, getting, and setting of optionally defined features such
* as memory sparing or post package sparing. Vendors may define custom
* features for the device.
*/
/* All the features below are exclusive to the kernel */
static const uuid_t cxl_exclusive_feats[] = {
CXL_FEAT_PATROL_SCRUB_UUID,