Lakshmi Yadlapati 205e0c0577 hwmon: (pmbus/max31785) Add delay between bus accesses
The MAX31785 has shown erratic behaviour across multiple system
designs, unexpectedly clock stretching and NAKing transactions.

Experimentation shows that this seems to be triggered by a register access
directly back to back with a previous register write. Experimentation also
shows that inserting a small delay after register writes makes the issue go
away.

Use a similar solution to what the max15301 driver does to solve the same
problem. Create a custom set of bus read and write functions that make sure
that the delay is added.

Signed-off-by: Lakshmi Yadlapati <lakshmiy@us.ibm.com>
Link: https://lore.kernel.org/r/20231027044346.2167548-1-lakshmiy@us.ibm.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2023-10-28 09:22:03 -07:00
2023-09-19 13:21:33 -07:00
2022-09-28 09:02:20 +02:00
2023-09-24 14:31:13 -07:00

Linux kernel
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