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add initial freebsd riscv support
This commit is contained in:
committed by
Stephen M. Webb
parent
b62977ab32
commit
00b847fea2
1
README
1
README
@@ -47,6 +47,7 @@ This library supports several architecture/operating-system combinations:
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| FreeBSD | AArch64 | ✓ |
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| FreeBSD | PPC32 | ✓ |
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| FreeBSD | PPC64 | ✓ |
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| FreeBSD | RISC-V | 64-bit only |
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| QNX | Aarch64 | ✓ |
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| QNX | x86-64 | ✓ |
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| Solaris | x86-64 | ✓ |
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@@ -23,8 +23,6 @@ LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
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#if defined __linux__
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/* https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/riscv/setjmp.S;h=0b92016b311b11aa9eeb62b38c670a262f1924c9;hb=HEAD */
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#define JB_SP 13
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#define JB_RP 0
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@@ -45,5 +43,3 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
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#else
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# error "Add offsets here"
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#endif /* __riscv_xlen */
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#endif
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@@ -146,6 +146,52 @@ _UCD_access_reg (unw_addr_space_t as,
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return -UNW_EINVAL;
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}
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}
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#elif defined(UNW_TARGET_RISCV)
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if (regnum >= UNW_RISCV_X0 && regnum <= UNW_RISCV_X31) {
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switch (regnum) {
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case UNW_RISCV_X0: *valp = 0; break;
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case UNW_RISCV_X1: *valp = ui->prstatus->pr_reg.ra; break;
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case UNW_RISCV_X2: *valp = ui->prstatus->pr_reg.sp; break;
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case UNW_RISCV_X3: *valp = ui->prstatus->pr_reg.gp; break;
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case UNW_RISCV_X4: *valp = ui->prstatus->pr_reg.tp; break;
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case UNW_RISCV_X5: *valp = ui->prstatus->pr_reg.t[0]; break;
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case UNW_RISCV_X6: *valp = ui->prstatus->pr_reg.t[1]; break;
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case UNW_RISCV_X7: *valp = ui->prstatus->pr_reg.t[2]; break;
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case UNW_RISCV_X8: *valp = ui->prstatus->pr_reg.s[0]; break;
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case UNW_RISCV_X9: *valp = ui->prstatus->pr_reg.s[1]; break;
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case UNW_RISCV_X10: *valp = ui->prstatus->pr_reg.a[0]; break;
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case UNW_RISCV_X11: *valp = ui->prstatus->pr_reg.a[1]; break;
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case UNW_RISCV_X12: *valp = ui->prstatus->pr_reg.a[2]; break;
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case UNW_RISCV_X13: *valp = ui->prstatus->pr_reg.a[3]; break;
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case UNW_RISCV_X14: *valp = ui->prstatus->pr_reg.a[4]; break;
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case UNW_RISCV_X15: *valp = ui->prstatus->pr_reg.a[5]; break;
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case UNW_RISCV_X16: *valp = ui->prstatus->pr_reg.a[6]; break;
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case UNW_RISCV_X17: *valp = ui->prstatus->pr_reg.a[7]; break;
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case UNW_RISCV_X18: *valp = ui->prstatus->pr_reg.s[2]; break;
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case UNW_RISCV_X19: *valp = ui->prstatus->pr_reg.s[3]; break;
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case UNW_RISCV_X20: *valp = ui->prstatus->pr_reg.s[4]; break;
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case UNW_RISCV_X21: *valp = ui->prstatus->pr_reg.s[5]; break;
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case UNW_RISCV_X22: *valp = ui->prstatus->pr_reg.s[6]; break;
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case UNW_RISCV_X23: *valp = ui->prstatus->pr_reg.s[7]; break;
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case UNW_RISCV_X24: *valp = ui->prstatus->pr_reg.s[8]; break;
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case UNW_RISCV_X25: *valp = ui->prstatus->pr_reg.s[9]; break;
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case UNW_RISCV_X26: *valp = ui->prstatus->pr_reg.s[10]; break;
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case UNW_RISCV_X27: *valp = ui->prstatus->pr_reg.s[11]; break;
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case UNW_RISCV_X28: *valp = ui->prstatus->pr_reg.t[3]; break;
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case UNW_RISCV_X29: *valp = ui->prstatus->pr_reg.t[4]; break;
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case UNW_RISCV_X30: *valp = ui->prstatus->pr_reg.t[5]; break;
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case UNW_RISCV_X31: *valp = ui->prstatus->pr_reg.t[6]; break;
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}
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} else {
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switch (regnum) {
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case UNW_RISCV_PC:
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*valp = ui->prstatus->pr_reg.sepc;
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break;
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default:
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Debug(0, "bad regnum:%d\n", regnum);
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return -UNW_EINVAL;
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}
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}
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#else
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#error Port me
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@@ -93,6 +93,9 @@ _UPT_access_fpreg (unw_addr_space_t as, unw_regnum_t reg, unw_fpreg_t *val,
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#elif defined(__powerpc__)
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if ((unsigned) reg < UNW_PPC32_F0 || (unsigned) reg > UNW_PPC32_F31)
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return -UNW_EBADREG;
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#elif defined(__riscv)
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if ((unsigned) reg < UNW_RISCV_F0 || (unsigned) reg > UNW_RISCV_F31)
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return -UNW_EBADREG;
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#else
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#error Fix me
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#endif
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@@ -116,6 +119,8 @@ _UPT_access_fpreg (unw_addr_space_t as, unw_regnum_t reg, unw_fpreg_t *val,
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memcpy(&fpreg.fp_q[reg], val, sizeof(unw_fpreg_t));
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#elif defined(__powerpc__)
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memcpy(&fpreg.fpreg[reg], val, sizeof(unw_fpreg_t));
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#elif defined(__riscv)
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memcpy(&fpreg.fp_x[reg], val, sizeof(unw_fpreg_t));
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#else
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#error Fix me
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#endif
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@@ -136,6 +141,8 @@ _UPT_access_fpreg (unw_addr_space_t as, unw_regnum_t reg, unw_fpreg_t *val,
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memcpy(val, &fpreg.fp_q[reg], sizeof(unw_fpreg_t));
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#elif defined(__powerpc__)
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memcpy(val, &fpreg.fpreg[reg], sizeof(unw_fpreg_t));
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#elif defined(__riscv)
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memcpy(val, &fpreg.fp_x[reg], sizeof(unw_fpreg_t));
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#else
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#error Fix me
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#endif
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@@ -1,5 +1,3 @@
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#ifdef __linux__
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/* Linux-specific definitions: */
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/* The RISC-V ucontext has the following structure:
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@@ -7,7 +5,3 @@
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https://github.com/torvalds/linux/blob/44db63d1ad8d71c6932cbe007eb41f31c434d140/arch/riscv/include/uapi/asm/ucontext.h
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*/
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#define UC_MCONTEXT_REGS_OFF 176
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#else
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# error "Unsupported OS"
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#endif
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