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Author SHA1 Message Date
Ville Syrjälä
1c5f18d88e drm: Export drm_plane_has_format() 
Export drm_plane_has_format() so that drivers can use it.

v2: add kerneldoc

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240619113144.1616-1-ville.syrjala@linux.intel.com
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Daniel Stone <daniels@collabora.com>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
 2024-06-24 17:08:53 +03:00
Ville Syrjälä
1d36db2b51 drm: Rename drm_plane_check_pixel_format() to drm_plane_has_format() 
Rename drm_plane_check_pixel_format() to drm_plane_has_format()
and change the return type accordingly. Allows one to write
more natural code.

Also matches drm_any_plane_has_format() better.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240612204712.31404-2-ville.syrjala@linux.intel.com
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
 2024-06-24 17:08:33 +03:00
Mitul Golani
213cc30331 drm/i915/display: Consider adjusted_pixel_rate to be u64 
Consider adjusted_pixel_rate to be a u64 to match the return
type of mul_u32_u32() and avoid any compiler dependency for
do_div.

Fixes: 1676ecd303 ("drm/i915: Compute CMRR and calculate vtotal")
Cc: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: Suraj Kandpal <suraj.kandpal@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Nathan Chancellor <nathan@kernel.org>
Cc: intel-xe@lists.freedesktop.org
Reported-by: Nathan Chancellor <nathan@kernel.org>
Closes: https://lore.kernel.org/r/20240619154207.GA1125704@thelio-3990X
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240621073454.1421676-1-mitulkumar.ajitkumar.golani@intel.com
 2024-06-24 15:32:15 +05:30
Jouni Högander
582e372f06 drm/i915/psr: Set DP_PSR_SU_REGION_SCANLINE_CAPTURE bit when needed 
Setting DP_PSR_SU_REGION_SCANLINE_CAPTURE (Selective Update Region Scan
Line Capture Indication in spec) bit was dropped when psr_enable_sink was
split to _psr_enable_sink and _panel_replay_enable_sink. Add setting it
back.

Fixes: 32f0045f90 ("drm/i915/psr: Split enabling sink for PSR and Panel Replay")
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240620103312.903977-1-jouni.hogander@intel.com
 2024-06-24 07:31:56 +03:00
Imre Deak
b1d90a862c drm/xe: Use the encoder suspend helper also used by the i915 driver 
Use the suspend encoders helper which is also used by the i915 driver.
This fixes an issue in the xe driver where the encoder
suspend_complete() hook is not called and was an overlook when this hook
was added in commit b61fad5f7e ("drm/i915/tc: Call TypeC port
flush_work/cleanup without modeset locks held") for i915, but not added
to the xe driver (which was still in a separate source tree at the above
point).

v2: Fix checkpatch warn in commit log. (Rodrigo)

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240618125255.4080303-3-imre.deak@intel.com
 2024-06-20 19:48:01 +03:00
Imre Deak
b2c42f9d5e drm/i915: Pass intel_display to the encoder suspend/shutdown helpers 
Pass intel_display to the encoder suspend/shutdown helpers instead of
drm_i915_private for better isolation.

v2: Pass intel_display to HAS_DISPLAY() as well, update commit log
    accordingly. (Jani)

Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> # v1
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240618125255.4080303-2-imre.deak@intel.com
 2024-06-20 19:47:54 +03:00
Imre Deak
cc2ee76a90 drm/i915: Move encoder suspend/shutdown helpers to intel_encoder.c 
Move the encoder suspend/shutdown helpers to intel_encoder.c, this being
the logical place for encoder functions.

This also allows sharing the above helpers with the xe driver, done in a
follow-up patch.

While at it rename the functions using the usual intel_encoder prefix
and in the functions rename the dev_priv parameter to i915.

v2: Remove extra w/s in the include section. (Jani)

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> # v1
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240618125255.4080303-1-imre.deak@intel.com
 2024-06-20 19:47:50 +03:00
Ville Syrjälä
67577e2ead drm/i915/dsb: Document that the ATS fault bits are for mtl+ 
The ATS faults have something to do with some new iommu stuff
on mtl+. Document that the relevant DSB interrupt bits aren't
valid for earlier platforms.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240611133344.30673-11-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-20 15:41:23 +03:00
Ville Syrjälä
5bdd780180 drm/i915: Drop useless intel_dsb.h include 
intel_crtc.c doens't need intel_dsb.h so don't include it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240611133344.30673-10-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-20 15:41:09 +03:00
Ville Syrjälä
7562c88be8 drm/i915/dsb: Add i915.enable_dsb module parameter 
As we extend the use of DSB for critical pipe/plane register
programming, it'll be nice to have an escape valve at hand,
in case things go very poorly. To that end, add a i915.enable_dsb
modparam by which we can force the driver to take the pure mmio
path instead.

v2: Use 0400 permissions for the actual modparam (Jani)

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240611133344.30673-9-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-20 15:40:01 +03:00
Ville Syrjälä
4a74de9105 drm/i915/dsb: Convert the DSB code to use intel_display rather than i915 
The future direction will be to mainly use intel_display
rather than i915 in the display code. Start on that path
for the DSB code.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240611133344.30673-8-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-20 15:38:27 +03:00
Ville Syrjälä
a6c8dfbfcd drm/i915/dsb: Plumb the whole atomic state into intel_dsb_prepare() 
The DSB code will need to examine both the old and new crtc
states. Pass in the whole atomic state so we can dig up
what we need.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240611133344.30673-7-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-20 15:38:08 +03:00
Ville Syrjälä
42c8065d83 drm/i915: Pass the whole atomic state to intel_color_prepare_commit() 
We'll have need to examine both the old and new crtc states in
intel_color_prepare_commit(), so let's just pass in the whole
atomic state.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240611133344.30673-6-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-20 15:37:59 +03:00
Ville Syrjälä
294ffd2bfa drm/i915: Introduce intel_mode_vdisplay() 
The DSB code will need to know the hardware's idea of vertical
active, as that is also what defines the start of undelayed
vblank. Introduce a helper that gives us that information,
in line with the other intel_mode_v*() functions.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240611133344.30673-5-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-20 15:37:47 +03:00
Ville Syrjälä
367cf0d8a6 drm/i915: Add flip done tracepoint 
Add a tracepoint to see exactly when async flips complete.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240611133344.30673-4-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-20 15:37:36 +03:00
Ville Syrjälä
91103ca375 drm/i915: Add async flip tracepoint 
Add a separate tracepoint for async flips vs. sync plane updates
to make it a bit easier to figure out what is happening.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240611133344.30673-3-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-20 15:36:42 +03:00
Ville Syrjälä
b493b26b06 drm/i915: Extract intel_crtc_arm_vblank_event() 
We'll need to arm the vblank event also from the future
DSB based codepath. Extract the function that does the
whold dance for us.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240611133344.30673-2-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-20 15:35:56 +03:00
Ville Syrjälä
851de367de drm/i915: Enable plane/pipeDMC ATS fault interrupts on mtl 
MTL has some new IOMMU thing that has a few new fault interrupts.
Enable those so we can know if things are going poorly.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240605111832.21373-8-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-19 20:06:12 +03:00
Ville Syrjälä
a669b81328 drm/i915: Enable pipeDMC fault interrupts on tgl+ 
PipeDMC has its own fault interrupt. Enable that so that
we can know if things are failing.

While at it, define the other pipeDMC interrupt as well, even
though we're not currently using it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240605111832.21373-7-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-19 20:05:12 +03:00
Ville Syrjälä
ba30cd246f drm/i915: Nuke the intermediate pipe fault bitmasks 
GEN8_DE_PIPE_IRQ_FAULT_ERRORS & co. don't really achieve anything.
Get rid of them and just declare all the bits directly in
gen8_de_pipe_fault_mask().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240605111832.21373-6-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-19 20:04:45 +03:00
Ville Syrjälä
fa63577ff3 drm/i915: Extend GEN9_PIPE_PLANE_FLIP_DONE() to cover all universal planes 
GEN9_PIPE_PLANE_FLIP_DONE() only works for planes 1-4. Extend
it handle planes 5-7 as well. Somewhat annoyingly the bits are
spread around into two distinct clumps.

Currently this doesn't achieve anything, but if we ever extend
async flip support to more than just the first plane then we'll
need this.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240605111832.21373-5-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-19 20:02:48 +03:00
Ville Syrjälä
ad738e4889 drm/i915: Sort bdw+ pipe interrupt bits 
It's really hard to figure out which bdw+ pipe interrupt bits
we've defined and which we have not. Sort the defines to make
that a bit easier (still not super easy since the bits have
been shuffled a bit over the years).

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240605111832.21373-4-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-19 20:02:10 +03:00
Ville Syrjälä
9994be5584 drm/i915: Document bdw+ pipe interrupt bits 
Sprinkle some notes indicating which platforms have which
pipe interrupt bits.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240605111832.21373-3-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-19 20:01:59 +03:00
Ville Syrjälä
6399c94f4b drm/i915: Use REG_BIT() for bdw+ pipe interrupts 
Replace the hand rolled (1<<n) with the modern REG_BIT()
approach for the bdw+ pipe interrupt bits.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240605111832.21373-2-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-19 20:01:42 +03:00
Jani Nikula
d754ed2821 Merge drm/drm-next into drm-intel-next 
Sync to v6.10-rc3.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-19 11:38:31 +03:00
Jouni Högander
dcaacff03a intel_alpm: Fix wrong offset for PORT_ALPM_* registers 
PORT_ALPM_* registers are using MMIO_TRANS2 macro. This is not correct as
they are port register. Use _PORT_MMIO instead.

Fixes: 4ee30a4482 ("drm/i915/alpm: Add ALPM register definitions")
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240618053026.3268759-10-jouni.hogander@intel.com
 2024-06-19 07:42:12 +03:00
Jouni Högander
dc9cfe9f1d Revert "drm/i915/psr: Disable early transport by default" 
This reverts commit f3c2031db7.

We want to notice possible issues faced with PSR2 Region Early Transport as
early as possible -> let's revert patch disabling Region Early Transport by
default. Also eDP 1.5 Panel Replay requires Early Transport.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240618053026.3268759-9-jouni.hogander@intel.com
 2024-06-19 07:42:11 +03:00
Jouni Högander
c52a3187a1 drm/i915/psr: Add new debug bit to disable Panel Replay 
Add new debug bit to be used with i915_edp_psr_debug debugfs
interface. This can be used to disable Panel Replay.

v2: ensure that fastset is performed when the bit changes

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240618053026.3268759-8-jouni.hogander@intel.com
 2024-06-19 07:42:10 +03:00
Jouni Högander
3ec391a007 drm/i915/psr: Disable PSR/Panel Replay on sink side for PSR only 
Enabling/disabling Panel Replay on sink side has to be done before link
training. We can't disable it in sink side on PSR disable.

Fixes: 88ae6c65ec ("drm/i915/psr: Unify panel replay enable/disable sink")
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240618053026.3268759-7-jouni.hogander@intel.com
 2024-06-19 07:42:10 +03:00
Jouni Högander
aeb7a0fe21 drm/i915/psr: Disable PSR2 SU Region ET if enable_psr module parameter is set 
Currently PSR2 SU Region Early Transport is enabled by default on Lunarlake
if panel supports it despite enable_psr module parameter value. This patch
makes it possible for user to limit used PSR mode and prevent SU Region
Early Transport by setting enable_psr as 2. With default (-1) PSR2 SU
Region Early Transport is allowed.

v2: fix/improve commit desciption

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240618053026.3268759-6-jouni.hogander@intel.com
 2024-06-19 07:42:09 +03:00
Jouni Högander
b445130c35 drm/i915/psr: Disable Panel Replay if PSR mode is set via module parameter 
If user is specifically limiting PSR mode to PSR1 or PSR2: disable Panel
Replay. With default value -1 all modes are allowed including Panel
Replay. Disabling PSR using value 0 disables Panel Replay as well.

Also own compute config helper is added for Panel Replay. This makes sense
because number of Panel Replay specific checks are increasing.

v2: Squash adding Panel Replay compute config helper

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240618053026.3268759-5-jouni.hogander@intel.com
 2024-06-19 07:42:09 +03:00
Jouni Högander
22f3a60558 drm/i915/alpm: Fix port clock usage in AUX Less wake time calculation 
Port clock is link rate in 10 kbit/s units. Take this into account when
calculating AUX Less wake time.

Fixes: da6a9836ac ("drm/i915/psr: Calculate aux less wake time")
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240618053026.3268759-4-jouni.hogander@intel.com
 2024-06-19 07:42:08 +03:00
Jouni Högander
1eb28818c2 drm/i915/display: Wa 16021440873 is writing wrong register 
Wa 16021440873 is writing wrong register. Instead of PIPE_SRCSZ_ERLY_TPT
write CURPOS_ERLY_TPT.

v2: use right offset as well

Fixes: 29cdef8539 ("drm/i915/display: Implement Wa_16021440873")
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240618053026.3268759-3-jouni.hogander@intel.com
 2024-06-19 07:42:08 +03:00
Jouni Högander
97db734864 drm/i915/psr: Set SU area width as pipe src width 
Currently SU area width is set as MAX_INT. This is causing
problems. Instead set it as pipe src width.

Fixes: 86b26b6aea ("drm/i915/psr: Carry su area in crtc_state")

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240618053026.3268759-2-jouni.hogander@intel.com
 2024-06-19 07:42:07 +03:00
Mitul Golani
e2dc7cb72b drm/i915/display: Update calculation to avoid overflow 
Update calculation to avoid overflow.

-v2:
Remove extra line between cc and signed-off.

Fixes: 1676ecd303 ("drm/i915: Compute CMRR and calculate vtotal")
Cc: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: Suraj Kandpal <suraj.kandpal@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Acked-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240614044213.377710-1-mitulkumar.ajitkumar.golani@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
 2024-06-17 15:09:11 -04:00
Vinod Govindapillai
355d210aad drm/i915/display: update handling of FBC when VT-d active workaround 
Move the handling of the disabling FBC when VT-d is active wa
as part of the intel_fbc_check_plane(). As the hw is still there,
intel_fbc_sanitize should be able to handle the state properly.

v2: update the patch description (Jani Nikula)

v3: fix the return value in wa handling (Jani Nikula)

Bspec: 21664
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240528114826.134958-1-vinod.govindapillai@intel.com
 2024-06-17 13:01:57 +03:00
Jani Nikula
b295609937 drm/i915: move comments about FSB straps to proper place 
Move the comment about FSB straps to where the relevant register is
read.

Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/8a5b6cd3db80259c30263861f1a9ff04fea2e7f0.1718356614.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-17 11:54:31 +03:00
Jani Nikula
1cd377f33d drm/i915/cdclk: use i9xx_fsb_freq() for rawclk_freq initialization 
Instead of duplicating the CLKCFG parsing, reuse i9xx_fsb_freq() to
figure out rawclk_freq where applicable.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/21511f155f1f446e066117bc6ed3165618d7afd6.1718356614.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-17 11:54:31 +03:00
Jani Nikula
d0a6e5015f drm/i915: use i9xx_fsb_freq() for GT clock frequency 
Reuse i9xx_fsb_freq() for GT clock frequency initialization instead of
depending on rawclk_freq.

Note: If the init order was changed, we could use i915->fsb_freq
directly. However, GT clock initialization is done in
i915_driver_mmio_probe(), but intel_dram_detect() later in
i915_driver_hw_probe(), with a dependency on intel_pcode_init().

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/0678d8ec9772725b47d4fa5b14e3b3a34256d5cf.1718356614.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-17 11:54:31 +03:00
Jani Nikula
fc8bf96105 drm/i915: extend the fsb_freq initialization to more platforms 
Initialize fsb frequency for more platforms to be able to use it for GT
clock and rawclk frequency initialization.

Note: There's a discrepancy between existing pnv_fsb_freq() and
i9xx_hrawclk() regarding CLKCFG interpretation. Presume all PNV is
mobile.

Default to 1333 MHz for unknown values, similar to i9xx_hrawclk().

v2:
- Add MISSING_CASE() (Ville)
- Default to the same frequency for both branches (Ville)

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/7cd6dbd4dafb900ac1dd12be0ec096ff1d5fc6cf.1718356614.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-17 11:54:31 +03:00
Jani Nikula
a4ad402078 drm/i915: convert fsb_freq and mem_freq to kHz 
We'll want to use fsb frequency for deriving GT clock and rawclk
frequencies in the future. Increase the accuracy by converting to
kHz. Do the same for mem freq to be aligned.

Round the frequencies ending in 666 to 667.

v2: Also handle mem_freq in gen5_rps_init() (Ville)

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/17fe2544b876549f63fac0f956273f5f282081b3.1718356614.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-17 11:54:31 +03:00
Jani Nikula
024a05a47e drm/i915/gt: remove mem freq from gt debugfs 
It's a bit out of place, and only printed for VLV/CHV.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/bbfec4c67a81d1d3de1f40484a80b7164e69df21.1718356614.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-17 11:54:31 +03:00
Jani Nikula
846bd6086d drm/i915/dram: rearrange mem freq init 
Follow the same style in mem freq init as in fsb freq init, returning
the value instead of assigning in multiple places.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/f098ccdbb0c42016d5dad81e0b089bb4babe29f0.1718356614.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-17 11:54:31 +03:00
Jani Nikula
e6534546a4 drm/i915/dram: split out pnv DDR3 detection 
Split out the PNV DDR3 detection to a distinct step instead of
conflating it with mem freq detection.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/c4bf9d32479ab5024e9daa37a996508f543f05e9.1718356614.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-17 11:54:31 +03:00
Jani Nikula
9d4f1aeb25 drm/i915/dram: separate fsb freq detection from mem freq 
To simplify further changes, add separate functions for reading the fsb
frequency.

This ends up reading CLKCFG register twice, but it's not a big deal.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/7582651aa21ac2c1472111c4e81ba8fee182f80e.1718356614.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-17 11:54:30 +03:00
Jani Nikula
322dc10b2a drm/i915/wm: clarify logging on not finding CxSR latency config 
Clarify and unify the logging on not finding PNV CxSR latency
config.

Just let the i915->fsb_freq == 0 || i915->mem_freq == 0 case go through
the table instead of checking for it separately.

v2: Do not check for fsb == 0 || mem == 0 separately (Matt)

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/6333cb0675c531e971e829105f1ecfc4d71bdc6b.1718356614.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-17 11:54:30 +03:00
Jani Nikula
105dadedc4 drm/i915/wm: rename intel_get_cxsr_latency -> pnv_get_cxsr_latency 
Clarify that the function is specific to PNV, making subsequent changes
slightly easier to grasp.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/7d4e3c9a4220ff84af2741e5cd7bb62d1b4f2a44.1718356614.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-17 11:54:30 +03:00
Jani Nikula
8b5a92ca24 drm/i915/mso: using joiner is not possible with eDP MSO 
It's not possible to use the joiner at the same time with eDP MSO. When
a panel needs MSO, it's not optional, so MSO trumps joiner.

v3: Only change intel_dp_has_joiner(), leave debugfs alone (Ville)

Fixes: bc71194e88 ("drm/i915/edp: enable eDP MSO during link training")
Cc: <stable@vger.kernel.org> # v5.13+
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/1668
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240614142311.589089-1-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-17 11:42:48 +03:00
Ville Syrjälä
574884438c drm/i915: Remove bogus MST check in intel_dp_has_audio() 
No idea what this MST checks is doing in intel_dp_has_audio().
Looks completely pointless, so get rid of it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240517145356.26103-8-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-14 20:28:38 +03:00
Ville Syrjälä
b47e62b1ed drm/i915: Utilize edp_disable_dsc from VBT 
Disable eDP DSC usage when instructed to do so by the VBT.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240517145356.26103-7-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-14 20:28:38 +03:00